Commonly designers will add large capacitors (100pF to >10uF) directly from the output to ground in an attempt to filter the output to reduce noise on the output or reset timing circuits. TI discourages this practice as it can cause several problems.

A charged capacitor can source peak currents of several amps. When the output goes low, the output must then short the charged capacitor, which causes the output to go into current limit. Long-term, this can stress the output. If discharging a capacitor with the output is desired, as in a timing application, a series current limiting resistor must be used to keep the peak current below 10mA or less. Adding the series resistor, with the appropriate adjustment to the capacitor value, will provide a more controlled discharge as it will swamp out the slight device variations in the short circuit current. If a series resistor is unacceptable, then a suitable external discrete pass transistor or MOSFET must be used.

Of course, adding the output capacitor increases the propagation delay by directly affecting the risetime and falltime.

Adding a large output capacitor will affect any added hysteresis feedback by adding a delay and slowing the output edges, resulting in bursting or outright cancellation of the hysteresis.

Instead, TI recommends filtering the input signal and using hysteresis instead of brute-force filtering of the output with a capacitor. These techniques can maintain the proper propagation delay while minimizing chatter or false triggers on noisy signals. Please see AN-74 LM139/LM239/LM339 A Quad of Independently Functioning Comparators, application note for more information about adding hysteresis to filter noise.