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Product details

Parameters

Number of channels (#) 2 Output type Open-collector Propagation delay time (µs) 1.3 Vs (Max) (V) 30 Vs (Min) (V) 2 Vos (offset voltage @ 25 C) (Max) (mV) 7 Iq per channel (Typ) (mA) 0.4 Input bias current (+/-) (Max) (nA) 50 Rail-to-rail Out Rating Catalog Operating temperature range (C) -40 to 125 Features Standard comparator VICR (Max) (V) 28.5 VICR (Min) (V) 0 open-in-new Find other Comparators

Package | Pins | Size

PDIP (P) 8 93 mm² 9.81 x 9.43 SOIC (D) 8 19 mm² 4.9 x 3.9 SOIC (D) 8 19 mm² 3.91 x 4.9 SOP (PS) 8 48 mm² 6.2 x 7.8 TSSOP (PW) 8 19 mm² 3 x 6.4 VSSOP (DGK) 8 15 mm² 3 x 4.9 open-in-new Find other Comparators
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Technical documentation

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Design tools & simulation

SIMULATION MODELS Download
SLCJ011.ZIP (0 KB) - PSpice Model
SIMULATION TOOLS Download
SPICE-based analog simulation program
TINA-TI TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
document-generic User guide

Reference designs

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CAD/CAE symbols

Package Pins Download
PDIP (P) 8 View options
SO (PS) 8 View options
SOIC (D) 8 View options
TSSOP (PW) 8 View options
VSSOP (DGK) 8 View options

Ordering & quality

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