SNOS725E May   1999  – March 2025 LMC6462 , LMC6464

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information for LMC6462
    5. 5.5 Thermal Information for LMC6464
    6. 5.6 Electrical Characteristics for VS = ±2.25V or VS = 5V
    7. 5.7 Electrical Characteristics for VS = ±1.5V or VS = 3V
  7. 6 Typical Characteristics
  8. 7 Application and Implementation
    1. 7.1 Application Information
      1. 7.1.1 Input Common-Mode Voltage Range
      2. 7.1.2 Rail-to-Rail Output
      3. 7.1.3 Capacitive Load Tolerance
      4. 7.1.4 Compensating for Input Capacitance
      5. 7.1.5 Offset Voltage Adjustment
      6. 7.1.6 Instrumentation Circuits
    2. 7.2 Typical Applications
      1. 7.2.1 Transducer Interface Circuits
      2. 7.2.2 LMC646x as a Comparator
      3. 7.2.3 Half-Wave and Full-Wave Rectifiers
      4. 7.2.4 Precision Current Source
      5. 7.2.5 Oscillators
      6. 7.2.6 Low Frequency Null
    3. 7.3 Layout
      1. 7.3.1 Layout Guidelines
        1. 7.3.1.1 PCB Layout for High-Impedance Work
  9. 8 Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 Development Support
        1. 8.1.1.1 PSpice® for TI
    2. 8.2 Documentation Support
    3. 8.3 Receiving Notification of Documentation Updates
    4. 8.4 Support Resources
    5. 8.5 Trademarks
    6. 8.6 Electrostatic Discharge Caution
    7. 8.7 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

7.1.3 Capacitive Load Tolerance

The LMC646x can typically drive a 200pF load with VS = 5V at unity gain without oscillating. The unity gain follower is the most sensitive configuration to capacitive load. Direct capacitive loading reduces the phase margin of op amps. The combination of the op amp output impedance and the capacitive load induces phase lag. This results in either an underdamped pulse response or oscillation.

Capacitive load compensation can be accomplished using resistive isolation as shown in Figure 7-4. If there is a resistive component of the load in parallel to the capacitive component, the isolation resistor and the resistive load create a voltage divider at the output. This introduces a DC error at the output.

LMC6462 LMC6464 Resistive Isolation of a 300pF Capacitive Load Figure 7-4 Resistive Isolation of a 300pF Capacitive Load
LMC6462 LMC6464 Pulse Response of the LMC6462 Circuit Shown in Figure 7-4 Figure 7-5 Pulse Response of the LMC6462 Circuit Shown in Figure 7-4

Figure 7-5 displays the pulse response of the LMC646x circuit in Figure 7-4.

Another circuit, shown in Figure 7-6, is also used to indirectly drive capacitive loads. This circuit is an improvement to the circuit shown in Figure 7-4 because Figure 7-6 provides dc accuracy as well as ac stability. R1 and C1 serve to counteract the loss of phase margin by feeding the high frequency component of the output signal back to the amplifiers inverting input, thereby preserving phase margin in the overall feedback loop. The values of R1 and C1 can be experimentally determined by the system designer for the desired pulse response. Increased capacitive drive is possible by increasing the value of the capacitor in the feedback loop.

LMC6462 LMC6464 Noninverting Amplifier, Compensated to Handle a 300pF Capacitive and 100kΩ Resistive Load Figure 7-6 Noninverting Amplifier, Compensated to Handle a 300pF Capacitive and 100kΩ Resistive Load
LMC6462 LMC6464 Pulse Response of LMC6462 Circuit in Figure 7-6 Figure 7-7 Pulse Response of LMC6462 Circuit in Figure 7-6

The pulse response of the circuit shown in Figure 7-6 is shown in Figure 7-7