SNOSB22D October   2008  – April 2025 LM5574-Q1

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
  7. Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Shutdown and Standby
      2. 6.3.2 Current Limit
      3. 6.3.3 Soft Start
      4. 6.3.4 Thermal Protection
    4. 6.4 Device Functional Modes
      1. 6.4.1 High Voltage Start-Up Regulator
      2. 6.4.2 Oscillator and Sync Capability
      3. 6.4.3 Error Amplifier and PWM Comparator
      4. 6.4.4 Ramp Generator
      5. 6.4.5 Maximum Duty Cycle and Input Dropout Voltage
      6. 6.4.6 Boost Pin
  8. Application and Implementation
    1. 7.1 Application Information
      1. 7.1.1 Bias Power Dissipation Reduction
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1  Custom Design With WEBENCH® Tools
        2. 7.2.2.2  External Components
        3. 7.2.2.3  R3 (RT)
        4. 7.2.2.4  L1- Inductor
        5. 7.2.2.5  C3- Ramp Capacitor
        6. 7.2.2.6  C9 -Output Capacitor
        7. 7.2.2.7  D1 - Async Diode
        8. 7.2.2.8  C1- Input Capacitor
        9. 7.2.2.9  C8 - Vcc Capacitor
        10. 7.2.2.10 C7 - BST Capacitor
        11. 7.2.2.11 C4 - SS Capacitor
        12. 7.2.2.12 R5, R6 - Feedback Resistor
        13. 7.2.2.13 R1, R2, C2 - SD Pin Components
        14. 7.2.2.14 R4, C5, C6 - Compensation Components
      3. 7.2.3 Application Curves
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
      3. 7.4.3 Power Dissipation
      4. 7.4.4 Thermal Considerations
  9. Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 Development Support
        1. 8.1.1.1 Custom Design With WEBENCH® Tools
    2. 8.2 Receiving Notification of Documentation Updates
    3. 8.3 Support Resources
    4. 8.4 Trademarks
    5. 8.5 Electrostatic Discharge Caution
    6. 8.6 Glossary
  10. Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Current Limit

The LM5574-Q1 contains a unique current monitoring scheme for control and overcurrent protection. When set correctly, the emulated current sense signal provides a signal which is proportional to the buck switch current with a scale factor of 2.0V/A. The emulated ramp signal is applied to the current limit comparator. If the emulated ramp signal exceeds 1.4V (0.7A), the present current cycle is terminated (cycle-by-cycle current limiting). In applications with small output inductance and high input voltage the switch current can overshoot due to the propagation delay of the current limit comparator. If an overshoot occurs, the diode current sampling circuit detects the excess inductor current during the off-time of the buck switch. If the sample and hold DC level exceeds the 1.4V current limit threshold, the buck switch is disabled and skips pulses until the diode current sampling circuit detects the inductor current has decayed below the current limit threshold. This approach prevents current runaway conditions due to propagation delays or inductor saturation because the inductor current is forced to decay following any current overshoot.