SNOSB22D October   2008  – April 2025 LM5574-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Shutdown and Standby
      2. 6.3.2 Current Limit
      3. 6.3.3 Soft Start
      4. 6.3.4 Thermal Protection
    4. 6.4 Device Functional Modes
      1. 6.4.1 High Voltage Start-Up Regulator
      2. 6.4.2 Oscillator and Sync Capability
      3. 6.4.3 Error Amplifier and PWM Comparator
      4. 6.4.4 Ramp Generator
      5. 6.4.5 Maximum Duty Cycle and Input Dropout Voltage
      6. 6.4.6 Boost Pin
  8. 7 Application and Implementation
    1. 7.1 Application Information
      1. 7.1.1 Bias Power Dissipation Reduction
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1  Custom Design With WEBENCH® Tools
        2. 7.2.2.2  External Components
        3. 7.2.2.3  R3 (RT)
        4. 7.2.2.4  L1- Inductor
        5. 7.2.2.5  C3- Ramp Capacitor
        6. 7.2.2.6  C9 -Output Capacitor
        7. 7.2.2.7  D1 - Async Diode
        8. 7.2.2.8  C1- Input Capacitor
        9. 7.2.2.9  C8 - Vcc Capacitor
        10. 7.2.2.10 C7 - BST Capacitor
        11. 7.2.2.11 C4 - SS Capacitor
        12. 7.2.2.12 R5, R6 - Feedback Resistor
        13. 7.2.2.13 R1, R2, C2 - SD Pin Components
        14. 7.2.2.14 R4, C5, C6 - Compensation Components
      3. 7.2.3 Application Curves
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
      3. 7.4.3 Power Dissipation
      4. 7.4.4 Thermal Considerations
  9. 8 Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 Development Support
        1. 8.1.1.1 Custom Design With WEBENCH® Tools
    2. 8.2 Receiving Notification of Documentation Updates
    3. 8.3 Support Resources
    4. 8.4 Trademarks
    5. 8.5 Electrostatic Discharge Caution
    6. 8.6 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

7.1.1 Bias Power Dissipation Reduction

Buck regulators operating with high input voltage can dissipate an appreciable amount of power for the bias of the IC. The VCC regulator must step-down the input voltage VIN to a nominal VCC level of 7V. The large voltage drop across the VCC regulator translates into a large power dissipation within the VCC regulator. There are several techniques that can significantly reduce this bias regulator power dissipation. Figure 7-1 and Figure 7-2 depict two methods to bias the IC from the output voltage. In each case the internal VCC regulator is used to initially bias the VCC pin. After the output voltage is established, the VCC pin potential is raised above the nominal 7V regulation level, which effectively disables the internal VCC regulator. The voltage applied to the VCC pin must never exceed 14V. The VCC voltage must never be larger than the VIN voltage.

LM5574-Q1 VCC Bias From VOUT for 8V < VOUT < 14VFigure 7-1 VCC Bias From VOUT for 8V < VOUT < 14V
LM5574-Q1 VCC Bias With Additional Winding on the Output InductorFigure 7-2 VCC Bias With Additional Winding on the Output Inductor