SNOSDE0A February 2022 – May 2022 LM74502-Q1 , LM74502H-Q1
PRODUCTION DATA
An external circuit as shown in Figure 9-2 can be added on the GATE pin of the LM74502-Q1 to have additional inrush current control for the applications which have large capacitive loads.
The CdVdT capacitor is required for slowing down the GATE voltage ramp during power up for inrush current limiting. Use Equation 3 to calculate CdVdT capacitance value.
where IGATE is 60 μA (typical), IINRUSH is the inrush current and COUT is the output load capacitance. An extra resistor, RG, in series with the CdVdT capacitor acts as an isolation resistor between Cdvdt and gate of the MOSFET.
The inrush current control scheme shown in Figure 9-2 is not applicable to LM74502H-Q1 as its gate drive is optimized for fast turn-on load switch applications.