SNVAA63 March   2023 TPSM365R6

 

  1.   Abstract
  2.   Trademarks
  3. 1Inverting Buck-Boost Topology
    1. 1.1 Concept
    2. 1.2 Output Current Calculations
    3. 1.3 VIN and VOUT Range in Inverting Configuration
  4. 2Design Considerations
    1. 2.1 Additional Bypass Capacitor and Schottky Diode
    2. 2.2 Start-up Behavior and Switching Node Consideration
  5. 3External Components
    1. 3.1 Capacitor Selection
    2. 3.2 System Loop Stability
  6. 4Typical Performance
  7. 5Digital Pin Configurations
    1. 5.1 Digital Input Pin
    2. 5.2 Power-Good Pin
  8. 6Conclusion
  9. 7References

4 Typical Performance

Figure 4-1 Basic Schematic Used
Figure 4-3 Efficiency vs. Load Current at VIN = 24 V
Figure 4-5 Start-up on VIN = 24 V, VOUT = –12 V, Expected Performance With no Level Shifters
Figure 4-7 Load Transient Response, 100 mA to 410 mA With VIN = 24 V, VOUT = –12 V
Figure 4-9 Output Voltage Ripple, VIN = 24 V, VOUT = –12 V, IOUT = 0 mA
GUID-20230125-SS0I-TX92-BZMF-FJ7ZW19GZTHC-low.pngFigure 4-11 Temperature Response, VIN = 24 V, VOUT = –5 V, IOUT = 450 mA

DSGNR Part Number Description MFR QTY
CIN C3225X7R2A225K230AM 2.2 uF, 100 V, X7R, 1210 TDK 1
GRM188R72A104KA35J 0.1 uF, 100 V, X7R, 0603 MuRata 1
CFF CGA2B2C0G1H100D050BA 10 pF, 50 V, C0G/NP0, 0402 TDK 1
CBYP C3225X7R2A225K230AB 2.2 uF, 100 V, X7R, 1210 TDK 1
CVCC C1608X7R1C105K080AC 1 uF, 16 V, X7R, 0603 TDK 1
COUT C3225X7R1E226M250AB 22 uF, 25 V, X7R, 1210 TDK 2

Figure 4-2 Capacitors Used
Figure 4-4 Load Regulation at VIN = 24 V
Figure 4-6 Shutdown on VIN = 24 V, VOUT = –12 V, Expected Performance With no Level Shifters
Figure 4-8 Load Transient Response, 0 mA to 410 mA With VIN = 24 V, VOUT = –12 V
Figure 4-10 Output Voltage Ripple, VIN = 24 V, VOUT = –12 V, IOUT = 410 mA
GUID-20230210-SS0I-8C2X-XCZL-VSW1WHG7FTMC-low.jpgFigure 4-12 Temperature Response, VIN = 24 V, VOUT = –12 V, IOUT = 410 mA