SNVAA94 November   2023 LM5113-Q1 , LMG1205 , LMG1210

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1 Introduction
  5. 2 Bootstrap Overcharge
  6. 3 Modeling Bootstrap Overcharge
  7. 4 Changing Bootstrap Components
  8. 5 Zener Diode Method
  9. 6 Schottky Diode Method
  10. 7 Overvoltage Clamp Method
  11. 8 Active Switch Method
  12. 9 Synchronous GaN Bootstrap Method
  13. 10Other Methods of Preventing Bootstrap Overcharge
    1. 10.1 Reducing Dead Time
    2. 10.2 Opting for a Bias Supply
    3. 10.3 Adjusting for Gate Voltage
  14. 11Summary
  15. 12References

2 Bootstrap Overcharge

The negative voltage created during the dead time has a few consequences. First, negative voltage contributes to losses as the low-side FET must dissipate VSD multiplied by IL. Second, negative voltage leads to overcharging on the bootstrap circuit, which is often used to provide bias to the high-side FET. Typically, the bootstrap capacitor (Cboot) is charged when the low-side FET is on and the HS node approaches 0 V Current (Iboot) and then flows through the bootstrap diode from VDD to charge the Cboot capacitor to VDD. See Bootstrap Circuitry Selection for Half-Bridge Configurations for further explanation of bootstrap circuits.

During dead time, the potential across Cboot can increase to VDD plus the negative voltage, easily exceeding 6–7 V in many cases. This means that the bootstrap capacitor is overcharged to voltages above VDD. This type of overcharging is possible in all half-bridge configurations, not just ones using GaN FETs. However, GaN FETs tend to have a sensitive gate that can handle only 6–8 V maximum, depending on the construction. Bootstrap overcharge prevention is critical in GaN half-bridges because of higher negative HS voltages and greater sensitivity to overcharging. Some half-bridge gate drivers like LM5113-Q1, LMG1205, and LMG1210 have integrated bootstrap overcharge prevention circuits.