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Product details

Parameters

Power switch MOSFET, GaNFET Input VCC (Min) (V) 4.5 Input VCC (Max) (V) 5.5 Peak output current (A) 5 Rise time (ns) 7 Operating temperature range (C) -40 to 125 Rating Catalog Number of channels (#) 2 Fall time (ns) 3.5 Prop delay (ns) 35 Iq (uA) 90 Input threshold TTL Channel input logic TTL Negative voltage handling at HS pin (V) -5 Features Bootstrap supply voltage clamping, Split outputs on high and low side open-in-new Find other Half-bridge drivers

Package | Pins | Size

DSBGA (YFX) 12 0 mm² 1.765 x 1.915 open-in-new Find other Half-bridge drivers

Features

  • Independent High-Side and Low-Side
    TTL Logic Inputs
  • 1.2-A Peak Source, 5-A Sink Current
  • High-Side Floating Bias Voltage Rail
    Operates up to 100 VDC
  • Internal Bootstrap Supply Voltage Clamping
  • Split Outputs for Adjustable
    Turnon, Turnoff Strength
  • 0.6-Ω Pulldown, 2.1-Ω Pullup Resistance
  • Fast Propagation Times (35 ns Typical)
  • Excellent Propagation Delay Matching
    (1.5 ns Typical)
  • Supply Rail Undervoltage Lockout
  • Low Power Consumption

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Description

The LMG1205 is designed to drive both the high-side and the low-side enhancement mode Gallium Nitride (GaN) FETs in a synchronous buck, boost, or half-bridge configuration. The device has an integrated 100-V bootstrap diode and independent inputs for the high-side and low-side outputs for maximum control flexibility. The high-side bias voltage is generated using a bootstrap technique and is internally clamped at 5 V, which prevents the gate voltage from exceeding the maximum gate-source voltage rating of enhancement mode GaN FETs. The inputs of the LMG1205 are TTL logic compatible and can withstand input voltages up to 14 V regardless of the VDD voltage. The LMG1205 has split-gate outputs, providing flexibility to adjust the turnon and turnoff strength independently.

In addition, the strong sink capability of the LMG1205 maintains the gate in the low state, preventing unintended turnon during switching. The LMG1205 can operate up to several MHz. The LMG1205 is available in a 12-pin DSBGA package that offers a compact footprint and minimized package inductance.

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Same functionality but is not pin-for-pin or parametrically equivalent to the compared device:
LMG1210 ACTIVE 1.5-A, 3-A, 200-V half bridge gate driver, 5-V UVLO and programmable dead-time for GaNFET and MOSFET This product offers superior switching performance (10-ns prop delay, 1-ns delay matching), resistor-programmable deadtime, an internal LDO, and 300-V/ns CMTI.

Technical documentation

= Top documentation for this product selected by TI
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Type Title Date
* Datasheet LMG1205 80-V, 1.2-A to 5-A, Half Bridge GaN Driver with Integrated Bootstrap Diode datasheet (Rev. A) Feb. 27, 2018
Application notes External Gate Resistor Selection Guide (Rev. A) Feb. 28, 2020
Application notes Understanding Peak IOH and IOL Currents (Rev. A) Feb. 28, 2020
White papers Optimizing multi-megahertz GaN driver design white paper (Rev. A) Nov. 27, 2018
Technical articles How to achieve higher system robustness in DC drives, part 3: minimum input pulse Sep. 19, 2018
Technical articles How to achieve higher system robustness in DC drives, part 2: interlock and deadtime May 30, 2018
Technical articles Boosting efficiency for your solar inverter designs May 24, 2018
Technical articles How to achieve higher system robustness in DC drives, part 1: negative voltage Apr. 17, 2018
User guides Using the LMG1205HBEVM Mar. 22, 2017

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Hardware development

EVALUATION BOARDS Download
document-generic User guide
149
Description

80-V 10A Power Stage EVM - The LMG1205 half-bridge EVM board is a small, easy to use, power stage with an external PWM signal. The EVM is suitable for evaluating the performance of the LMG1205 driving a GaN half-bridge in many different DC-DC converter topologies. It can be used to estimate the (...)

Features
  • Input voltage operates up to 80V
  • Simple open loop design to evaluate performance of LMG1205 driving a GaN Half-Bridge
  • VDD supply generated from an onboard linear regulator
  • Single PWM  input on board for PWM signal with < 8ns dead time
  • Kelvin sense capability for input and output to measure efficiency
  • (...)

Design tools & simulation

SIMULATION MODELS Download
SNOM621A.ZIP (9 KB) - TINA-TI Spice Model
SIMULATION MODELS Download
SNOM622A.TSC (131 KB) - TINA-TI Reference Design
SIMULATION MODELS Download
SNOM624A.ZIP (35 KB) - PSpice Model
SIMULATION TOOLS Download
PSpice® for TI design and simulation tool
PSPICE-FOR-TI — PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
Features
  • Leverages Cadence PSpice Technology
  • Preinstalled library with a suite of digital models to enable worst-case timing analysis
  • Dynamic updates ensure you have access to most current device models
  • Optimized for simulation speed without loss of accuracy
  • Supports simultaneous analysis of multiple products
  • (...)

Reference designs

REFERENCE DESIGNS Download
Unregulated LLC module reference design for two-stage 54-V POL in data centers
PMP22519 — This reference design is for two-stage power architecture for 54V to VCore voltage regulator module (VRM) powering CPUs, GPUs and DDR memory in 48-V rack power architecture in data centers. The First-stage is an unregulated LLC resonant converter with an integrated planar magnetic structure and (...)
document-generic Schematic document-generic User guide

CAD/CAE symbols

Package Pins Download
DSBGA (YFX) 12 View options

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