Product details


Bus voltage (Max) (V) 300 Power switch MOSFET, GaNFET Input VCC (Min) (V) 6 Input VCC (Max) (V) 18 Peak output current (A) 3 Rise time (ns) 0.5 Operating temperature range (C) -40 to 125 Undervoltage lockout (Typ) 4 Rating Catalog Number of channels (#) 2 Fall time (ns) 0.5 Prop delay (ns) 10 Iq (uA) 300 Input threshold TTL Channel input logic TTL/PWM Features Resistor-controllable deadtime, Internal LDO, Bootstrap supply voltage clamp open-in-new Find other Half-bridge drivers


  • Up to 50-MHz operation
  • 10-ns typical propagation delay
  • 3.4-ns high-side to low-side matching
  • Minimum pulse width of 4 ns
  • Two control input options
    • Single PWM input with adjustable dead time
    • Independent input mode
  • 1.5-A peak source and 3-A peak sink currents
  • External bootstrap diode for flexibility
  • Internal LDO for adaptability to voltage rails
  • High 300-V/ns CMTI
  • HO to LO capacitance less than 1 pF
  • UVLO and overtemperature protection
  • Low-inductance WQFN package

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The LMG1210 is a 200-V, half-bridge MOSFET and Gallium Nitride Field Effect Transistor (GaN FET) driver designed for ultra-high frequency, high-efficiency applications that features adjustable deadtime capability, very small propagation delay, and 3.4-ns high-side low-side matching to optimize system efficiency. This part also features an internal LDO which ensures a gate-drive voltage of 5-V regardless of supply voltage.

To enable best performance in a variety of applications, the LMG1210 allows the designer to choose the optimal bootstrap diode to charge the high-side bootstrap capacitor. An internal switch turns the bootstrap diode off when the low side is off, effectively preventing the high-side bootstrap from overcharging and minimizing the reverse recovery charge. Additional parasitic capacitance across the GaN FET is minimized to less than 1 pF to reduce additional switching losses.

The LMG1210 features two control input modes: Independent Input Mode (IIM) and PWM mode. In IIM each of the outputs is independently controlled by a dedicated input. In PWM mode the two complementary output signals are generated from a single input and the user can adjust the dead time from 0 to 20 ns for each edge. The LMG1210 operates over a wide temperature range from –40°C to 125°C and is offered in a low-inductance WQFN package.

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Technical documentation

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Design tools & simulation

SNOM615C.ZIP (22427 KB) - PSpice Model
SNOM617C.TSC (610 KB) - TINA-TI Reference Design
SNOM677.ZIP (7 KB) - PSpice Model
PSpice® for TI design and simulation tool
PSPICE-FOR-TI — PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
  • Leverages Cadence PSpice Technology
  • Preinstalled library with a suite of digital models to enable worst-case timing analysis
  • Dynamic updates ensure you have access to most current device models
  • Optimized for simulation speed without loss of accuracy
  • Supports simultaneous analysis of multiple products
  • (...)
SNOR026.ZIP (3265 KB)

Reference designs

Comparison: 0.8V/8W GaN vs Silicon Power Supply Reference Design
PMP21440 — This reference design provides customers with a comparison study on the usage of GaN vs SI in power supply designs. This specific design uses TPS40400 controller to drive CSD87381 for the silicon power supply and LMG1210 with EPC2111 for the GaN power supply to provide 0.8V/10A. This design compares (...)
document-generic Schematic document-generic User guide
Multi-MHz GaN Power Stage Reference Design for High-Speed DC/DC Converters
TIDA-01634 — This reference design implements a multi-MHz power stage design based on the LMG1210 half-bridge GaN driver and GaN power High Electron Mobility Transistors (HEMTs). With highly efficient switches and flexible dead-time adjustment, this design can significantly improve power density while achieving (...)
document-generic Schematic document-generic User guide

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