1.5-A, 3-A, 200-V half bridge gate driver, 5-V UVLO and programmable dead-time for GaNFET and MOSFET
Product details
Parameters
Features
- Up to 50-MHz operation
- 10-ns typical propagation delay
- 3.4-ns high-side to low-side matching
- Minimum pulse width of 4 ns
- Two control input options
- Single PWM input with adjustable dead time
- Independent input mode
- 1.5-A peak source and 3-A peak sink currents
- External bootstrap diode for flexibility
- Internal LDO for adaptability to voltage rails
- High 300-V/ns CMTI
- HO to LO capacitance less than 1 pF
- UVLO and overtemperature protection
- Low-inductance WQFN package
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Description
The LMG1210 is a 200-V, half-bridge MOSFET and Gallium Nitride Field Effect Transistor (GaN FET) driver designed for ultra-high frequency, high-efficiency applications that features adjustable deadtime capability, very small propagation delay, and 3.4-ns high-side low-side matching to optimize system efficiency. This part also features an internal LDO which ensures a gate-drive voltage of 5-V regardless of supply voltage.
To enable best performance in a variety of applications, the LMG1210 allows the designer to choose the optimal bootstrap diode to charge the high-side bootstrap capacitor. An internal switch turns the bootstrap diode off when the low side is off, effectively preventing the high-side bootstrap from overcharging and minimizing the reverse recovery charge. Additional parasitic capacitance across the GaN FET is minimized to less than 1 pF to reduce additional switching losses.
The LMG1210 features two control input modes: Independent Input Mode (IIM) and PWM mode. In IIM each of the outputs is independently controlled by a dedicated input. In PWM mode the two complementary output signals are generated from a single input and the user can adjust the dead time from 0 to 20 ns for each edge. The LMG1210 operates over a wide temperature range from –40°C to 125°C and is offered in a low-inductance WQFN package.
Technical documentation
Design & development
For additional terms or required resources, click any title below to view the detail page where available.Design tools & simulation
Features
- Leverages Cadence PSpice Technology
- Preinstalled library with a suite of digital models to enable worst-case timing analysis
- Dynamic updates ensure you have access to most current device models
- Optimized for simulation speed without loss of accuracy
- Supports simultaneous analysis of multiple products
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Reference designs
Design files
-
download PMP21440 BOM (Control).pdf (106KB) -
download PMP21440 BOM (Power).pdf (107KB) -
download PMP21440 Assembly Drawing (Control).pdf (76KB) -
download PMP21440 Assembly Drawing (Power).pdf (109KB) -
download PMP21440 Layer Plots.zip (699KB) -
download PMP21440 CAD Files.zip (1773KB) -
download PMP21440 Gerber.zip (5705KB)
Design files
-
download TIDA-01634 BOM.pdf (104KB) -
download TIDA-01634 Assembly Drawing.pdf (136KB) -
download TIDA-01634 PCB.pdf (716KB) -
download TIDA-01634 CAD Files.zip (45KB) -
download TIDA-01634 Gerber.zip (1201KB)
CAD/CAE symbols
Package | Pins | Download |
---|---|---|
(RVR) | 19 | View options |
Ordering & quality
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