3 Power Design

Figure 3-1 shows power tree with LP87565V-Q1, LP875230C-Q1, TPS6281120-Q1, and TPS74501-Q1 devices powering the G9H AP rails.

Figure 3-1 Semidrive G9H AP Power Design Block Diagram

Main features:

• 5V supplied from pre-regulator.
• After the devices are powered, the microcontroller can set the SYS_CTRL0 pin high to initiate the start-up sequence.
• Start-up delays are controlled internally in the LP87565V-Q1 and LP875230C-Q1 sequencer and discrete DC-DCs are controlled with PMIC GPIOs.
• I²C can be used to read status registers and reset interrupts.
• PMIC devices have dedicated I²C address so the devices can share the same I²C bus.
• PG signal from TPS6281120-Q1 act as AP_RESET signal for the SoC. LP875230C-PG and TPS74501-Q1 PG can be combined with this signal to allow SoC reset if any of these rails have failure.

Figure 3-2 shows power design with LP873248-Q1 powering the G9H safety rails.

Figure 3-2 Semidrive G9H Safety Power Design Block Diagram

Main features:

• 5V supplied from pre-regulator
• One SYS_PWR_ON signal controls start-up and shutdown sequences for all the rails
• PGOOD or GPO can be used for the RESET signal