SNVSCS3 February   2025 LP5892-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Timing Requirements
    7. 5.7 Switching Characteristics
    8. 5.8 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Independent and Stackable Mode
        1. 6.3.1.1 Independent Mode
        2. 6.3.1.2 Stackable Mode
      2. 6.3.2 Current Setting
        1. 6.3.2.1 Brightness Control (BC) Function
        2. 6.3.2.2 Color Brightness Control (CC) Function
        3. 6.3.2.3 Choosing BC/CC for a Different Application
      3. 6.3.3 Frequency Multiplier
      4. 6.3.4 Line Transitioning Sequence
      5. 6.3.5 Protections and Diagnostics
        1. 6.3.5.1 Thermal Shutdown Protection
        2. 6.3.5.2 IREF Resistor Short Protection
        3. 6.3.5.3 LED Open Load Detection and Removal
          1. 6.3.5.3.1 LED Open Detection
          2. 6.3.5.3.2 Read LED Open Information
          3. 6.3.5.3.3 LED Open Caterpillar Removal
        4. 6.3.5.4 LED Short and Weak Short Circuitry Detection and Removal
          1. 6.3.5.4.1 LED Short/Weak Short Detection
          2. 6.3.5.4.2 Read LED Short Information
          3. 6.3.5.4.3 LSD Caterpillar Removal
    4. 6.4 Device Functional Modes
    5. 6.5 Continuous Clock Series Interface
      1. 6.5.1 Data Validity
      2. 6.5.2 CCSI Frame Format
      3. 6.5.3 Write Command
        1. 6.5.3.1 Chip Index Write Command
        2. 6.5.3.2 VSYNC Write Command
        3. 6.5.3.3 MPSM Write Command
        4. 6.5.3.4 Standby Clear and Enable Command
        5. 6.5.3.5 Soft_Reset Command
        6. 6.5.3.6 Data Write Command
      4. 6.5.4 Read Command
    6. 6.6 PWM Grayscale Control
      1. 6.6.1 Grayscale Data Storage and Display
        1. 6.6.1.1 Memory Structure Overview
        2. 6.6.1.2 Details of Memory Bank
        3. 6.6.1.3 Write a Frame Data into Memory Bank
      2. 6.6.2 PWM Control for Display
    7. 6.7 Register Maps
      1. 6.7.1  FC0
      2. 6.7.2  FC1
      3. 6.7.3  FC2
      4. 6.7.4  FC3
      5. 6.7.5  FC4
      6. 6.7.6  FC14
      7. 6.7.7  FC15
      8. 6.7.8  FC17
      9. 6.7.9  FC19
      10. 6.7.10 FC20
      11. 6.7.11 FC21
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
        1. 7.2.1.1 System Structure
        2. 7.2.1.2 SCLK Frequency
        3. 7.2.1.3 Internal GCLK Frequency
        4. 7.2.1.4 Line Switch Time
        5. 7.2.1.5 Blank Time Removal
        6. 7.2.1.6 BC and CC
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1 Chip Index Command
        2. 7.2.2.2 FC Registers Settings
        3. 7.2.2.3 Grayscale Data Write
        4. 7.2.2.4 VSYNC Command
        5. 7.2.2.5 LED Open, Short Read
      3. 7.2.3 Application Curves
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Documentation Support
      1. 8.1.1 Related Documentation
    2. 8.2 Receiving Notification of Documentation Updates
    3. 8.3 Support Resources
    4. 8.4 Trademarks
    5. 8.5 Electrostatic Discharge Caution
    6. 8.6 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

6.7.4 FC3

FC3 is shown in FC3 Register and described in FC3 Register Field Descriptions.

Figure 6-29 FC3 Register
47464544434241403938373635343332
LSDVTH_BLSDVTH_GLSDVTH_RLSD_RMBC
R/W-000bR/W-000bR/W-000bR/W-0111bR/W-011b
31302928272625242322212019181716
CC_BCC_G
R/W-0111 1111bR/W-0111 1111b
1514131211109876543210
CC_RLOD_LSD_RBRESERVEDLODVTH_BLODVTH_GLODVTH_R
R/W-0111 1111bR/W-0bR-0bR/W-00bR/W-00bR/W-00b
Table 6-10 FC3 Register Field Descriptions
BitFieldTypeResetDescription
1-0LODVTH_RR/W00bSet the Red LED open load detection threshold
00b: (VLEDR-0.2) V
01b: (VLEDR-0.5) V
10b: (VLEDR-0.9) V
11b: (VLEDR-1.2) V
3-2LODVTH_GR/W00bSet the Green LED open load detection threshold
00b: (VLEDG-0.2) V
01b: (VLEDG-0.5) V
10b: (VLEDG-0.9) V
11b: (VLEDG-1.2) V
5-4LODVTH_BR/W00bSet the Blue LED open load detection threshold
00b: (VLEDB-0.2) V
01b: (VLEDB-0.5) V
10b: (VLEDB-0.9) V
11b: (VLEDB-1.2) V
6RESERVEDR0b
7LOD_LSD_RBR/W0bEnable or disable the LOD and LSD readback function
0b: disabled
01b: enabled
15-8CC_RR/W0111 1111bSet the Red color brightness level
0000 0000b: level 0 (lowest)
...
0111 1111b: level 127 (middle)
...
1111 1111b: level 255 (highest)
23-16CC_GR/W0111 1111bSet the Green color brightness level
0000 0000b: level 0 (lowest)
...
0111 1111b: level 127 (middle)
...
1111 1111b: level 255 (highest)
31-24CC_BR/W0111 1111bSet the Blue color brightness level
0000 0000b: level 0 (lowest)
...
0111 1111b: level 127 (middle)
...
1111 1111b: level 255 (highest)
34-32BCR/W011bSet the global brightness level
000b: level 0 (lowest)
...
011b: level 3 (middle)
...
111b: level 7 (highest)
38-35LSD_RMR/W0111bSet the LED short removal level
0000b: level 1
0001b: level 2
0010b: level 3
0011b: level 4
0100b: level 5
0101b: level 6
0110b: level 7
0111b: level 8
1000b: level 9
1001b: level 10
1010b: level 11
1011b: level 12
1100b: level 13
1101b: level 14
1110b: level 15
1111b: level 16
41-39LSDVTH_RR/W000bSet the Red LED short/weak short circuitry detection threshold (typical)
000b: 0.2 V
001b: 0.4 V
010b: 0.8 V
011b: 1.0 V
100b: 1.2 V
101b: 1.4 V
110b: 1.6 V
111b: 1.8 V
44-42LSDVTH_GR/W000bSet the Green LED short/weak short circuitry detection threshold (typical)
000b: 0.2 V
001b: 0.4 V
010b: 0.8 V
011b: 1.2 V
100b: 1.6 V
101b: 2 V
110b: 2.4 V
111b: 2.8 V
47-45LSDVTH_BR/W000bSet the Blue LED short/weak short circuitry detection threshold (typical)
000b: 0.2 V
001b: 0.4 V
010b: 0.8 V
011b: 1.2 V
100b: 1.6 V
101b: 2 V
110b: 2.4 V
111b: 2.8 V