SNVU755A January   2021  – June 2021 TLV841

 

  1.   Trademarks
  2. 1Introduction
    1. 1.1 Related Documentation
    2. 1.2 TLV841 Applications
  3. 2Schematic, Bill of Materials, and Layout
    1. 2.1 TLV841EVM Schematic
    2. 2.2 TLV841EVM Bill of Materials
    3. 2.3 Layout and Component Placement
    4. 2.4 Layout
  4. 3EVM Connectors
    1. 3.1 EVM Test Points
    2. 3.2 EVM Jumpers
  5. 4EVM Setup and Operation
    1. 4.1 Input Power (VDD)
    2. 4.2 Monitoring Voltage on SENSE Pin (TLV841S)
    3. 4.3 Monitoring Voltage on VDD (TLV841M and TLV841C)
    4. 4.4 Manual Reset (MR) (TLV841M)
    5. 4.5 Reset Output (RESET)
    6. 4.6 Reset Time Delay Programming (Program tD via CT) (TLV841C)
  6. 5Revision History

3.1 EVM Test Points

Table 3-1 lists the test points and functional descriptions. All TLV841 pins have a corresponding test point to the EVM. These test points are located close to the pins for more accurate measurements.

Table 3-1 Test Points
TEST POINT NUMBER TEST POINT SILKSCREEN LABEL FUNCTION DESCRIPTION
TP1 VDD Connection to VDD pin Allows the user to monitor the VDD pin. The VDD pin connects to the input power supply.
TP2 RESET Connection to RESET pin Allows the user to monitor the RESET output pin.
TP3 MR, SENSE, CT Connect to SENSE pin (variant option #1)Connect to MR pin (variant option #2)Connect to CT pin (variant option #3) Depending on which variant option is on the EVM board, the EVM allows the user to connect to:
  • SENSE pin. The SENSE pin is the voltage that will be monitored by TLV841S
  • MR pin. The MR (Manual Reset) pin, when pulled to a logic low allows the user to assert a reset signal on the RESET output pin.
  • CT pin. Allows the user to monitor the CT pin. The CT capacitor sets the time delay of the RESET output.
TP4 GND Connection to GND pin. Allows the user to connect to the ground plane.