SNVU935 March 2025 LM251772
| Reference Designator | Pins | Description | Default Connection |
|---|---|---|---|
| JP1 | Pin 1 to Pin 2 | Connect VOUT before sense resistor | * |
| Pin 2 to Pin 3 | Connect VOUT after sense resistor | ||
| JP2 | Pin 1 to Pin 3 | Can be used for Bode plot signal injection, when external voltage divider circuit is used | |
| Pin 4 to Pin 5 (FB) | Connect FB to VCC2 (if R2 is not assembled) to use internal voltage divider circuit | ||
| JP3 | Pin 1 to Pin 2 (VOUT1) | Connect BIAS to VOUT1 (output of power stage) | |
| Pin 2 to Pin 3 (VIN) | Connect BIAS to VIN | ||
| JP4 | Pin 1 to Pin 2 (GND) | Connect EN/UVLO to GND | |
| Pin 2 to Pin 3 (VIN) | Connect EN/UVLO to VIN | ||
| JP5 | Pin 1 to Pin 2 (GND) | Set MODE low: PSM mode | |
| Pin 2 to Pin 3 (VCC2) | Set MODE high: FPWM mode | * | |
JP6 | Pin 1 to Pin 2 (SYNC) | Set SYNC to GND | |
JP7 | Pin 1 to Pin 2 (GND) | Connect ILIMCOMP to GND | |
| Pin 2 to Pin 3 (VCC2) | Connect ILIMCOMP to VCC2 (disable current limiter) | ||
Open | Enable Current Limiter function | ||
JP8 | Pin 2 to Pin 3 (CFG2) | Set CFG2 to GND | |
JP9 | Pin 1 to Pin 2 (ADDR/AGND) | Set I2C ENABLED Address 0x6A | |
| Pin 2 to Pin 3 (ADDR/VCC2) | Set I2C ENABLED Address 0x6B | * | |
JP10 | Pin 2 to Pin 3 (CFG3/SDA) | Set CFG3/SDA to GND | |
JP11 | Pin 1 to Pin 2 (CFG4/SCL) | Set CFG4/SCL to GND | |
JP12 | Pin 1 to Pin 2 (VCC1) | Connect VCC1 to interface header J7 |