SPMU379A April   2026  – July 2026 TPS25751A

 

  1.   1
  2.   Read This First
    1.     Notational Conventions
    2.     Glossary
    3.     Related Documents
    4.     Support Resources
    5.     Trademarks
  3. 1Introduction
    1. 1.1 Purpose and Scope
  4. 2PD Controller Host Interface Description
    1. 2.1 Overview
    2. 2.2 Register and Field Notation
  5. 3Unique Address Interface
    1. 3.1 Unique Address Interface Protocol
  6. 4PD Controller Policy Modes
    1. 4.1 Overview
    2. 4.2 Source Policy Mode
    3. 4.3 Sink Policy Mode
  7. 5Register Overview
    1. 5.1 TPS25751A Registers
  8. 64CC Task Detailed Descriptions
    1. 6.1 Overview
    2. 6.2 CPU Control Tasks
      1. 6.2.1 'Gaid' - Return to Normal Operation
      2. 6.2.2 'GAID' - Cold Reset Request
    3. 6.3 PD Message Tasks
      1. 6.3.1 'SWSk' - PD PR_Swap to Sink
      2. 6.3.2 'SWSr' - PD PR_Swap to Source
      3. 6.3.3 'SWDF' - PD DR_Swap to DFP
      4. 6.3.4 'SWUF' - PD DR_Swap to UFP
      5. 6.3.5 'GSkC' - PD Get Sink Capabilities
      6. 6.3.6 'GSrC' - PD Get Source Capabilities
      7. 6.3.7 'SSrC' - PD Send Source Capabilities
      8. 6.3.8 'GPPI' - PD Get Port Partner Information
      9. 6.3.9 'MBRd' - Message Buffer Read
    4. 6.4 Power Switch Tasks
      1. 6.4.1 'SRDY' - System Ready to Sink Power
      2. 6.4.2 'SRYR' - SRDY reset
    5. 6.5 Patch Bundle Update Tasks
      1. 6.5.1 'PBMs' - Start Patch Burst Mode Download Sequence
      2. 6.5.2 'PBMc' - Patch Burst Mode Download Complete
      3. 6.5.3 'PBMe' - End Patch Burst Mode Download Sequence
      4. 6.5.4 'GO2P' - Go to Patch Mode
      5. 6.5.5 'FLrd' - Flash Memory Read
      6. 6.5.6 'FLad' - Flash Memory Write Start Address
      7. 6.5.7 'FLwd' - Flash Memory Write
      8. 6.5.8 'FLvy' - Flash Memory Verify
    6. 6.6 System Tasks
      1. 6.6.1 'ANeg' - Auto Negotiate Sink Update
      2. 6.6.2 'DBfg' - Clear Dead Battery Flag
      3. 6.6.3 'I2Cr' - I2C Read Transaction
      4. 6.6.4 'I2Cw' - I2C Write Transaction
      5. 6.6.5 'GPsh' - set GPIO high
      6. 6.6.6 'GPsl' - set GPIO low
  9. 7User Reference
    1. 7.1 PD Controller Application Customization
    2. 7.2 Loading a Patch Bundle
    3. 7.3 AUTO_NEGOTIATE_SINK Register
      1. 7.3.1 AUTO_NEGOTIATE_SINK Usage Example 1
      2. 7.3.2 AUTO_NEGOTIATE_SINK Usage Example 2
      3. 7.3.3 AUTO_NEGOTIATE_SINK Usage Example 3
      4. 7.3.4 AUTO_NEGOTIATE_SINK Usage Example 4
    4. 7.4 Liquid Detection Registers
    5. 7.5 GPIO Events
  10. 8Revision History

6.6.6 'GPsl' - set GPIO low

Table 6-28 'GPsl' - GPIO set output low
DescriptionThis Task sets the selected GPIO pin output to logic low.
INPUT DATAXBitNameDescription
Byte 1: GPIO number
7:0GPIOnumGPIO number, check device data-sheet for available GPIO's. For example, GPIOnum = 0 corresponds to GPIO0.
OUTPUT DATAXByte 1: Standard Task Return Code. See also Table 6-1.
Task Completion

The ‘GPsl’ Task completes after the new GPIO value is committed to the GPIO register.

Side Effects

There are many possible expected or unexpected side effects of changing the PD Controller’s GPIOs manually. GPIOs that are connected to PD Controller GPIO Events can not behave properly if they are modified by the ‘GPIO’ Command. Extreme care must be taken with the use of this Task.

Additional InformationGPIOs must be configured as an ouptut in the AppConfig for the 'GPsl' to work. Use the "Output Enable" field to set the GPIO to be an output pin. Use the "Initial Value" field to set the initial value.