SPRAD64 November   2022 AM620-Q1 , AM623 , AM625 , AM625-Q1

 

  1.   Trademarks
  2. 1 Introduction
  3. 2 Width/Spacing Proposal for Escapes
  4. 3 Stackup
  5. 4 Via Sharing
  6. 5 Floorplan Component Placement
  7. 6 Critical Interfaces Impact Placement
  8. 7 Routing Priority
  9. 8 SerDes Interfaces
  10. 9 DDR Interfaces
  11. 10Power Decoupling
  12. 11Route Lowest Priority Interfaces Last
  13. 12Summary

2 Width/Spacing Proposal for Escapes

The AM62x (AMC) solution has been designed to support the following. AM62x (AMC) package supports similar feature set as several other competition solutions with approximately 15% smaller package area and ~10% wider line width. This solution reduces PCB foot print and utilizes lower cost PCB rules, enabling compact and low-cost systems.

Table 2-1 Width/Spacing Proposal for Escapes
PCB Feature PCB Routing Requirements
Minimum via diameter 8 mils
Via hole size 8 mils
Minimum trace width/spacing required in the BGA breakout 3.2 mils / 3.7 mils
Number of layers used for escape 4 Layer
BGA land pad size 16 mils
Package Size 17.2 mm × 17.2 mm
PCB layers (signal routing, total) recommended 4, 8