To reduce cost, some applications with slowly changing input signals, particularly DC voltage sampling applications, often eliminate the amplifier circuit. In such cases, C_s must be designed sufficiently large to ensure adequate sampling accuracy.

To achieve a settling error of 0.5LSB, the capacitance value of C_s can be calculated using the following formula:

For a 12-bit ADC, C_s should be 2¹³ times C_H. If C_H is 7.5pF, then C_s should be at least 61nF.

At this point, C_s is large enough that its stored charge alone can charge and discharge C_H, and the resulting voltage fluctuation remains within the 0.5LSB error range. No real-time charge replenishment from the external circuit is required. Regardless of the external filter resistor R_s value or the sample-and-hold time, the single-sample accuracy requirement can be met.

However, for repeated oversampling or very high sampling frequencies, excessive R_s values can still affect sampling accuracy. Therefore, the design must also consider sampling frequency and other factors.

In theory, the sample-and-hold time can be set to the minimum value specified in the datasheet. However, because of parasitic inductance in the circuit, oscillation may occur in the voltage across the internal ADC capacitor. Therefore, sufficient margin should be reserved by increasing the sample-and-hold time appropriately.

Experimental Verification:

A commonly used resistor-divider circuit is shown on the left side of Figure 4-3. According to Thevenin's theorem, its equivalent resistance can be calculated as:

The equivalent R_s is essentially determined by the resistor-divider circuit. The resistance value cannot be too small; otherwise, power consumption and heat generation will increase. C_s is the adjustable parameter. In the following experiment, different C_s values were selected while using the same AQCP value of 59 (approximately 600ns sample-and-hold time), producing the following sampling results.

It can be seen that when the capacitor value is large, the sampled value is relatively accurate, whereas when the capacitor value is small, the error is significant, consistent with theoretical predictions.

Therefore, selecting an appropriate capacitor C_s has a substantial impact on sampling accuracy. In practice, the value of C_s must also be considered together with cutoff frequency, sampling frequency, and other factors.

If the sampling frequency is too high, sampling accuracy will also be affected. The following table shows sampled values obtained using the same RC parameters at different sampling frequencies.

As shown above, higher sampling frequencies result in lower sampling accuracy. Therefore, for applications requiring high cutoff frequencies and high sampling rates, amplifier-based circuits should be considered to improve accuracy.