SPRUJ42E March 2022 – October 2024 AM2631 , AM2631-Q1 , AM2632 , AM2632-Q1 , AM2634 , AM2634-Q1
PRODUCTION DATA
Interrupt mux control register.
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Offset = Base + (j * 4h); where j = 0 to 15d
| Instance Name | Physical Address |
|---|---|
| ICSSM_XBAR_INTR | 52E0 3004h + formula |
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
| RESERVED | |||||||
| NONE | |||||||
| 0h | |||||||
| 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
| RESERVED | INT_ENABLE | ||||||
| NONE | R/W | ||||||
| 0h | 0h | ||||||
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
| RESERVED | |||||||
| NONE | |||||||
| 0h | |||||||
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| RESERVED | MUX_CNTL | ||||||
| NONE | R/W | ||||||
| 0h | 0h | ||||||
| Bit | Field | Type | Reset | Description |
|---|---|---|---|---|
| 31:17 | RESERVED | NONE | 0h | Reserved |
| 16 | INT_ENABLE | R/W | 0h | Interrupt j Output Enable. |
| 15:6 | RESERVED | NONE | 0h | Reserved |
| 5:0 | MUX_CNTL | R/W | 0h | Mux Control for Interrupt j. |