SPRUJ42 User guide

SPRUJ42E March 2022 – October 2024 AM2631 , AM2631-Q1 , AM2632 , AM2632-Q1 , AM2634 , AM2634-Q1

PRODUCTION DATA

3.9.2.8 FSI_RX_CFG_RX_EVT_CLR_ALT1 Register

9.2.8.1 FSI_RX_CFG_RX_EVT_CLR_ALT1 Register (Offset = 18h) [reset = 0h]

Receive event and error clear register.

Table 3-1008 Instance Table

Instance Name	Physical Address
FSI_RX0	5029 0018h
FSI_RX1	5029 1018h
FSI_RX2	502B 0018h
FSI_RX3	502B 1018h

Figure 3-473 FSI_RX_CFG_RX_EVT_CLR_ALT1 Name Register

15	14	13	12	11	10	9	8
RESERVED_1	ERROR_TAG_MATCH	DATA_TAG_MATCH	PING_TAG_MATCH	DATA_FRAME	FRAME_OVERRUN	PING_FRAME	ERR_FRAME
R	W	W	W	W	W	W	W
0h	0h	0h	0h	0h	0h	0h	0h
7	6	5	4	3	2	1	0
BUF_UNDERRUN	FRAME_DONE	BUF_OVERRUN	EOF_ERR	TYPE_ERR	CRC_ERR	FRAME_WD_TO	PING_WD_TO
W	W	W	W	W	W	W	W
0h	0h	0h	0h	0h	0h	0h	0h

Table 3-1009 FSI_RX_CFG_RX_EVT_CLR_ALT1 Register Field Descriptions

Bit	Field	Type	Reset	Description
15	RESERVED_1	R	0h	Reserved
14	ERROR_TAG_MATCH	W	0h	Error Tag Match Glag Clear bit This bit clears the corresponding bit in the RX_EVT_STS register. 0h[W] = Writing a 0 to this bit will have no effect. 1h[W] = Writing a 1 to this bit will clear the corresponding bit in the RX_EVT_STS register to 0.
13	DATA_TAG_MATCH	W	0h	Data Tag Match Flag Clear bit This bit clears the corresponding bit in the RX_EVT_STS register. 0h[W] = Writing a 0 to this bit will have no effect. 1h[W] = Writing a 1 to this bit will clear the corresponding bit in the RX_EVT_STS register to 0.
12	PING_TAG_MATCH	W	0h	Ping Tag Match Flag Clear bit This bit clears the corresponding bit in the RX_EVT_STS register. 0h[W] = Writing a 0 to this bit will have no effect. 1h[W] = Writing a 1 to this bit will clear the corresponding bit in the RX_EVT_STS register to 0.
11	DATA_FRAME	W	0h	Data Frame Received Flag Clear bit This bit clears the corresponding bit in the RX_EVT_STS register. 0h[W] = Writing a 0 to this bit will have no effect. 1h[W] = Writing a 1 to this bit will clear the corresponding bit in the RX_EVT_STS register to 0.
10	FRAME_OVERRUN	W	0h	Frame Overrun Flag Clear bit This bit clears the corresponding bit in the RX_EVT_STS register. 0h[W] = Writing a 0 to this bit will have no effect. 1h[W] = Writing a 1 to this bit will clear the corresponding bit in the RX_EVT_STS register to 0.
9	PING_FRAME	W	0h	Ping Frame Received Flag Clear bit This bit clears the corresponding bit in the RX_EVT_STS register. 0h[W] = Writing a 0 to this bit will have no effect. 1h[W] = Writing a 1 to this bit will clear the corresponding bit in the RX_EVT_STS register to 0.
8	ERR_FRAME	W	0h	Error Frame Received Flag Clear bit This bit clears the corresponding bit in the RX_EVT_STS register. 0h[W] = Writing a 0 to this bit will have no effect. 1h[W] = Writing a 1 to this bit will clear the corresponding bit in the RX_EVT_STS register to 0.
7	BUF_UNDERRUN	W	0h	Receive Buffer Underrun Flag Clear bit This bit clears the corresponding bit in the RX_EVT_STS register. 0h[R/W] = Writing a 0 to this bit will have no effect. 1h[R/W] = Writing a 1 to this bit will clear the corresponding bit in the RX_EVT_STS register to 0.
6	FRAME_DONE	W	0h	Frame Done Flag Clear bit This bit clears the corresponding bit in the RX_EVT_STS register. 0h[W] = Writing a 0 to this bit will have no effect. 1h[W] = Writing a 1 to this bit will clear the corresponding bit in the RX_EVT_STS register to 0.
5	BUF_OVERRUN	W	0h	Receive Buffer Overrun Flag Clear bit This bit clears the corresponding bit in the RX_EVT_STS register. 0h[W] = Writing a 0 to this bit will have no effect. 1h[W] = Writing a 1 to this bit will clear the corresponding bit in the RX_EVT_STS register to 0.
4	EOF_ERR	W	0h	End-of-Frame Error Flag Clear bit This bit clears the corresponding bit in the RX_EVT_STS register. 0h[W] = Writing a 0 to this bit will have no effect. 1h[W] = Writing a 1 to this bit will clear the corresponding bit in the RX_EVT_STS register to 0.
3	TYPE_ERR	W	0h	Frame Type Error Flag Clear bit This bit clears the corresponding bit in the RX_EVT_STS register. 0h[W] = Writing a 0 to this bit will have no effect. 1h[W] = Writing a 1 to this bit will clear the corresponding bit in the RX_EVT_STS register to 0.
2	CRC_ERR	W	0h	CRC Error Flag Clear bit This bit clears the corresponding bit in the RX_EVT_STS register. 0h[W] = Writing a 0 to this bit will have no effect. 1h[W] = Writing a 1 to this bit will clear the corresponding bit in the RX_EVT_STS register to 0.
1	FRAME_WD_TO	W	0h	Frame Watchdog Timeout Flag Clear bit This bit clears the corresponding bit in the RX_EVT_STS register. 0h[W] = Writing a 0 to this bit will have no effect. 1h[W] = Writing a 1 to this bit will clear the corresponding bit in the RX_EVT_STS register to 0.
0	PING_WD_TO	W	0h	Ping Watchdog Timeout Flag Clear bit This bit clears the corresponding bit in the RX_EVT_STS register. 0h[W] = Writing a 0 to this bit will have no effect. 1h[W] = Writing a 1 to this bit will clear the corresponding bit in the RX_EVT_STS register to 0.