SPRUJ42 User guide | TI.com

SPRUJ42E March 2022 – October 2024 AM2631 , AM2631-Q1 , AM2632 , AM2632-Q1 , AM2634 , AM2634-Q1

PRODUCTION DATA

5.20.2.46 PBIST_ALGO Register

20.2.46.1 PBIST_ALGO Register (Offset = 1C4h) [reset = FFFFFFFFh]

ROM Algorithm Mask 0

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Table 5-2117 Instance Table

Instance Name	Physical Address
PBIST0	5330 01C4h

Figure 5-1042 PBIST_ALGO Name Register

31	30	29	28	27	26	25	24
ALGO3
R/W
FFh
23	22	21	20	19	18	17	16
ALGO2
R/W
FFh
15	14	13	12	11	10	9	8
ALGO1
R/W
FFh
7	6	5	4	3	2	1	0
ALGO0
R/W
FFh

Table 5-2118 PBIST_ALGO Register Field Descriptions

Bit	Field	Type	Reset	Description
31:24	ALGO3	R/W	FFh	This register is used to indicate the algorithm[s] to be used for the memory self-test routine. Each bit corresponds to a specific algorithm. Writing a value 1 to the particular bit, enables the corresponding algorithm. Writing a value 0 to the particular bit, disables the corresponding algorithm.
23:16	ALGO2	R/W	FFh	This register is used to indicate the algorithm[s] to be used for the memory self-test routine. Each bit corresponds to a specific algorithm. Writing a value 1 to the particular bit, enables the corresponding algorithm. Writing a value 0 to the particular bit, disables the corresponding algorithm.
15:8	ALGO1	R/W	FFh	This register is used to indicate the algorithm[s] to be used for the memory self-test routine. Each bit corresponds to a specific algorithm. Writing a value 1 to the particular bit, enables the corresponding algorithm. Writing a value 0 to the particular bit, disables the corresponding algorithm.
7:0	ALGO0	R/W	FFh	This register is used to indicate the algorithm[s] to be used for the memory self-test routine. Each bit corresponds to a specific algorithm. Writing a value 1 to the particular bit, enables the corresponding algorithm. Writing a value 0 to the particular bit, disables the corresponding algorithm.