SPRUJ42E March 2022 – October 2024 AM2631 , AM2631-Q1 , AM2632 , AM2632-Q1 , AM2634 , AM2634-Q1
PRODUCTION DATA
Capture Control Register 1
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| Instance Name | Physical Address |
|---|---|
| ECAP0 | 5024 0028h |
| ECAP1 | 5024 1028h |
| ECAP2 | 5024 2028h |
| ECAP3 | 5024 3028h |
| ECAP4 | 5024 4028h |
| ECAP5 | 5024 5028h |
| ECAP6 | 5024 6028h |
| ECAP7 | 5024 7028h |
| ECAP8 | 5024 8028h |
| ECAP9 | 5024 9028h |
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
| FREE_SOFT | PRESCALE | CAPLDEN | |||||
| R/W | R/W | R/W | |||||
| 0h | 0h | 0h | |||||
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| CTRRST4 | CAP4POL | CTRRST3 | CAP3POL | CTRRST2 | CAP2POL | CTRRST1 | CAP1POL |
| R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W |
| 0h | 0h | 0h | 0h | 0h | 0h | 0h | 0h |
| Bit | Field | Type | Reset | Description |
|---|---|---|---|---|
| 15:14 | FREE_SOFT | R/W | 0h | Emulation Control 3 TSCTR counter is unaffected by emulation
suspend (Run Free)
2 TSCTR counter is unaffected by emulation
suspend (Run Free)
1 TSCTR counter runs until = 0
0 TSCTR counter stops immediately on
emulation suspend |
| 13:9 | PRESCALE | R/W | 0h | Event Filter prescale select 31 Divide by 62
30 Divide by 60
5 Divide by 10
4 Divide by 8
3 Divide by 6
2 Divide by 4
1 Divide by 2
0 Divide by 1 (i.e,. no prescale, by-pass the
prescaler) |
| 8 | CAPLDEN | R/W | 0h | Enable Loading of CAP1-4 registers on a capture event. Note that this bit does not disable CEVTn events from being generated. 1 Enable CAP1-4 register loads at capture
event time.
0 Disable CAP1-4 register loads at capture
event time. |
| 7 | CTRRST4 | R/W | 0h | Counter Reset on Capture Event 4 1 Reset counter after Capture Event 4 time-
stamp has been captured (used in difference
mode operation)
0 Do not reset counter on Capture Event 4
(absolute time stamp operation) |
| 6 | CAP4POL | R/W | 0h | Capture Event 4 Polarity select 1 Capture Event 4 triggered on a falling edge
(FE)
0 Capture Event 4 triggered on a rising edge
(RE) |
| 5 | CTRRST3 | R/W | 0h | Counter Reset on Capture Event 3 1 Reset counter after Event 3 time-stamp has
been captured (used in difference mode
operation)
0 Do not reset counter on Capture Event 3
(absolute time stamp) |
| 4 | CAP3POL | R/W | 0h | Capture Event 3 Polarity select 1 Capture Event 3 triggered on a falling edge
(FE)
0 Capture Event 3 triggered on a rising edge
(RE) |
| 3 | CTRRST2 | R/W | 0h | Counter Reset on Capture Event 2 1 Reset counter after Event 2 time-stamp has
been captured (used in difference mode
operation)
0 Do not reset counter on Capture Event 2
(absolute time stamp) |
| 2 | CAP2POL | R/W | 0h | Capture Event 2 Polarity select 1 Capture Event 2 triggered on a falling edge
(FE)
0 Capture Event 2 triggered on a rising edge
(RE) |
| 1 | CTRRST1 | R/W | 0h | Counter Reset on Capture Event 1 1 Reset counter after Event 1 time-stamp has
been captured (used in difference mode
operation)
0 Do not reset counter on Capture Event 1
(absolute time stamp) |
| 0 | CAP1POL | R/W | 0h | Capture Event 1 Polarity select 1 Capture Event 1 triggered on a falling edge
(FE)
0 Capture Event 1 triggered on a rising edge
(RE) |