SPRUJ73 December   2023

 

  1.   1
  2.   Description
  3.   Features
  4.   4
  5. 1Evaluation Module Overview
    1. 1.1 Introduction
      1. 1.1.1 Read This First
        1. 1.1.1.1 Sitara MCU+ Academy
        2. 1.1.1.2 Important Usage Notes
    2. 1.2 Kit Contents
  6. 2Hardware Description
    1. 2.1 Component Identification
    2. 2.2 Power Requirements
      1. 2.2.1 Power Input Using USB Type-C Connector
      2. 2.2.2 Power Status LEDs
      3. 2.2.3 Power Tree
    3. 2.3 Functional Block Diagram
    4. 2.4 Header Information
    5. 2.5 Interfaces
      1. 2.5.1 ADC
      2. 2.5.2 LIN
      3. 2.5.3 MCAN
      4. 2.5.4 TRACE/GPMC Muxing Scheme
      5. 2.5.5 GPMC Memory Interface
        1. 2.5.5.1 PSRAM
        2. 2.5.5.2 GPMC Memory Footprint
        3. 2.5.5.3 NOR FLASH
      6. 2.5.6 TI 14-Pin Header
      7. 2.5.7 MIPI-60 Connector
    6. 2.6 HSEC Pinout
  7. 3Additional Information
    1. 3.1 If You Need Assistance
    2.     Trademarks
  8. 4References
    1. 4.1 Reference Documents
    2. 4.2 Other TI Components Used in This Design
  9. 5Revision History

2.4 Header Information

This version of the AM263x controlCARD Docking Station has 66 different headers. For the locations of each header, refer to Section 2.1. The signal details for each header pin is detailed below.

  • ADC Headers
    • For more information about the ADC interface, refer to Section 2.5.1.
Table 2-3 ADC - Variable Resistor Headers
Designator Pin 1 Pin 2 Pin 3
J18 ADC0_AIN0 ADC_POT1_OUT OPAMP1_IN
J22 ADC0_AIN1 ADC_POT2_OUT OPAMP2_IN
Table 2-4 ADC - Signal Conditioning Headers
Designator Pin 1 Pin 2
J65 ADC0_AIN0 OPAMP1_OUT
J66 ADC0_AIN1 OPAMP2_OUT
  • Power Headers

    Table 2-5 Power Supply Header
    Designator Pin 1 Pin 2
    J16 3V3 3V3
    J19 5V0 5V0
    J23 3V3 3V3
    J28 3V3 3V3
    J29 3V3 3V3

  • Ground Headers
    • All pins on the below headers are connected to Ground.
Table 2-6 Ground Headers
Designator All Pins (# of Pins)
J13 GND (2)
J14 GND (17)
J15 GND (15)
J17 GND (2)
J26 GND (2)
J27 GND (2)
J30 GND (2)
J33, J35, J37, J39, J41, J43, J45, J47, J49 GND
J34, J36, J38, J40, J42, J44, J45 GND
J48, J51, J53, J55, J57, J59, J61, J63 GND
J50, J52, J54, J56, J58, J60, J62, J64 GND
  • Breakout Headers
    • Each breakout header is mapped to specific HSEC pins. For more information and complete pinout, see Table 3-18.
  • MCAN Header
    • For more information about the MCAN interface, refer to Section 2.5.3.
Table 2-7 MCAN Header
Designator Pin 1 Pin 2 Pin 3
J3 MCAN0_CAN_P GND MCAN0_CAN_N
J5 MCAN2_CAN_P GND MCAN2_CAN_N
  • LIN Header
    • For more information about the LIN Interface, refer to Section 2.5.2.
Table 2-8 LIN Header
Designator Pin 1 Pin 2 Pin 3
J4 VBAT_LIN GND
J7 VLIN LIN1_OUT GND
J8 VLIN LIN3_OUT GND
  • TRACE Header
Table 2-9 MIPI-60 TRACE Header (J9)
Pin Signal Pin Signal Pin Signal
1 VREF_DEBUG 21 DATA1 41 DATA11
2 TMS 22 NC 42 NC
3 TCK 23 DATA2 43 DATA12
4 TDO 24 NC 44 NC
5 TDI 25 DATA3 45 DATA13
6 TRST 26 NC 46 NC
7 RTCK 27 DATA4 47 DATA14
8 NC 28 NC 48 NC
9 NC 29 DATA5 49 DATA15
10 NC 30 NC 50 NC
11 NC 31 DATA6 51 NC
12 VREF 32 NC 52 NC
13 CLK 33 DATA7 53 NC
14 NC 34 NC 54 NC
15 DBG_DETECT 35 DATA8 55 NC
16 GND 36 NC 56 NC
17 CTL 37 DATA9 57 GND
18 NC 38 NC 58 JTAG_MUX_SEL
19 DATA0 39 DATA10 59 NC
20 NC 40 NC 60 NC
  • JTAG Header

Table 2-10 14-Pin JTAG Header (J10)
Pin Signal Pin Signal
1 TMS 8 JTAG_MUX_SEL
2 NC 9 TCK
3 TDI 10 GND
4 GND 11 TCK
5 VREF 12 GND
6 NC 13 NC
7 TDO 14 NC