SPRUJ83D December 2023 – January 2026 AM62P , AM62P-Q1
Return to Summary Table
| Instance Name | Physical Address |
|---|---|
| CTRL_MMR0 | 0010 8400h |
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
| RESERVED | |||||||
| NONE | |||||||
| 0h | |||||||
| 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
| RESERVED | |||||||
| NONE | |||||||
| 0h | |||||||
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
| RESERVED | |||||||
| NONE | |||||||
| 0h | |||||||
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| RESERVED | SERDES0_CLKSEL_CORE_REFCLK_SEL | ||||||
| NONE | R/W | ||||||
| 0h | 0h | ||||||
| Bit | Field | Type | Reset | Description |
|---|---|---|---|---|
| 31:2 | RESERVED | NONE | 0h | Reserved |
| 1:0 | SERDES0_CLKSEL_CORE_REFCLK_SEL | R/W | 0h | Selects the source for the core_refclk input Field values (others are reserved): 2'b00 - HFOSC0_CLKOUT_SERDES 2'b01 - EXT_REFCLK1 (Pin) 2'b10 - MAIN_PLL2_HSDIV0_CLKOUT 2'b11 - MAIN_PLL0_HSDIV9_CLKOUT Reset Source: mod_g_rst_n |