SPRZ582B March 2025 – October 2025 AM62L
Debug: Wait-In-Reset (WIR) mode is not functional
The 16nm IO cells for 1.8V only and dual-voltage (1.8V/3.3V) glitch while transitioning from reset. Glitch occurs when input is logic 1.
This prevents the device from entering WIR mode after power-up.
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