| BCDMA |
i2431 BCDMA: RX Channel can lockup in certain scenarios |
YES |
YES |
| Boot |
i2435 Boot: ROM timeout for eMMC boot too long |
YES |
NO |
| Boot |
i2462 Boot: ROM xSPI-SFDP boot mode fails |
YES |
YES |
| Boot |
i2463 Boot: Possible boot failure with SD cards |
YES |
NO |
| Boot |
i2464 Boot: ROM is unable to boot from SD cards with incorrect formatting |
YES |
YES |
| Boot |
i2465 Boot: EMMC boot mode is slower than expected |
YES |
NO |
| Boot |
i2466 Boot: ROM boot fails for large file sizes |
YES |
YES |
| Boot |
i2467 Boot: ROM UART boot fails with large image |
YES |
NO |
| Boot |
i2469 Boot: ROM NOBOOT boot mode is not functional |
YES |
YES |
| Boot |
i2470 Boot: USB-DFU primary boot mode fails to transition to backup boot mode |
YES |
NO |
| Boot |
i2471 Boot: Certain primary/backup boot mode combinations fail |
YES |
NO |
| Boot |
i2473 Boot: eMMC boot may fail |
YES |
NO |
| Boot |
i2474 Boot: Certain second stage binaries fail for block based boot modes |
YES |
NO |
| Boot |
i2481 Boot: eMMC alternate boot fails if partition is not reprogrammed every time |
YES |
NO |
| Boot |
i2482 Boot: ROM does not provide enough clocks during SD card initialization |
YES |
NO |
| Boot |
i2484 Boot: ROM fails to parse X509 certificates using GENERALIZED time format |
YES |
NO |
| CPSW |
i2208 CPSW: ALE IET Express Packet Drops |
YES |
YES |
| CPSW |
i2401 CPSW: Host Timestamps Cause CPSW Port to Lock up |
YES |
YES |
| DDR |
i2160 DDR: Valid VRef Range Must be Defined During LPDDR4 Command Bus Training |
YES |
YES |
| Debug |
i2461 Debug: Wait-In-Reset (WIR) mode is not functional |
YES |
NO |
| LPM |
i2487 LPM: Low power modes may inadvertently corrupt DDR contents |
YES |
NO |
| MCAN |
i2278 MCAN: Message Transmit order is not ensured from dedicated Tx Buffers configured with
same Message ID |
YES |
YES |
| MCAN |
i2279 MCAN: Specification Update for dedicated Tx Buffers and Tx Queues configured with same
Message ID |
YES |
YES |
| MMCHS |
i2312 MMCSD: HS200 and SDR104 Command Timeout Window Too Small |
YES |
YES |
| MMCHS |
i2493 MMCSD: HS200 write failures |
YES |
YES |
| OSPI |
i2189 OSPI: Controller PHY Tuning Algorithm |
YES |
YES |
| OSPI |
i2249 OSPI: Internal PHY Loopback and Internal Pad Loopback clocking modes with DDR timing
inoperable |
YES |
YES |
| OSPI |
i2383 OSPI: 2-byte address is not supported in PHY DDR mode |
YES |
YES |
| PRG |
i2253 PRG: CTRL_MMR STAT registers are unreliable indicators of POK threshold
failure |
YES |
YES |
| USART |
i2310 USART: Erroneous clear/trigger of timeout interrupt |
YES |
YES |
| USART |
i2311 USART Spurious DMA Interrupts |
YES |
YES |
| USB |
i2409 USB: USB2 PHY locks up due to short suspend |
YES |
YES |