SWRS294F March   2023  – October 2025 CC3300 , CC3301

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 System Diagram
  6. 5 Pin Configuration and Functions
    1. 5.1 Pin Diagram
    2. 5.2 Pin Attributes
  7. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Electrical Characteristics
    5. 6.5  Thermal Resistance Characteristics
    6. 6.6  WLAN Performance: 2.4GHz Receiver Characteristics
    7. 6.7  WLAN Performance: 2.4GHz Transmitter Power
    8. 6.8  BLE Performance: Receiver Characteristics
    9. 6.9  BLE Performance: Transmitter Characteristics
    10. 6.10 Current Consumption: WLAN Static Modes
    11. 6.11 Current Consumption: 2.4GHz WLAN Use Cases
    12. 6.12 Current Consumption: BLE Static Modes
    13. 6.13 Current Consumption: BLE Use Cases
    14. 6.14 Current Consumption: Device Modes
    15. 6.15 Timing and Switching Characteristics
      1. 6.15.1 Power Supply Sequencing
      2. 6.15.2 Clocking Specifications
        1. 6.15.2.1 Slow Clock Generated Internally
        2. 6.15.2.2 Slow Clock Using an External Oscillator
          1. 6.15.2.2.1 External Slow Clock Requirements
        3. 6.15.2.3 Fast Clock Using an External Crystal (XTAL)
          1. 6.15.2.3.1 External Fast Clock XTAL Specifications
    16. 6.16 Interface Timing Characteristics
      1. 6.16.1 SDIO Timing Specifications
        1. 6.16.1.1 SDIO Timing Diagram—Default Speed
        2. 6.16.1.2 SDIO Timing Parameters: Default Speed
        3. 6.16.1.3 SDIO Timing Diagram—High Speed
        4. 6.16.1.4 SDIO Timing Parameters: High Speed
      2. 6.16.2 SPI Timing Specifications
        1. 6.16.2.1 SPI Timing Diagram
        2. 6.16.2.2 SPI Timing Parameters
      3. 6.16.3 UART 4-Wire Interface
        1. 6.16.3.1 UART Timing Diagram
        2. 6.16.3.2 UART Timing Parameters
  8. 7 Detailed Description
    1. 7.1 WLAN Features
    2. 7.2 Bluetooth Low Energy Features
  9. 8 Applications, Implementation, and Layout
  10. 9 Device and Documentation Support
    1. 9.1 Third-Party Products Disclaimer
    2. 9.2 Device Nomenclature Boilerplate
    3. 9.3 Tools and Software
    4. 9.4 Documentation Support
    5. 9.5 Support Resources
    6. 9.6 Trademarks
    7. 9.7 Electrostatic Discharge Caution
    8. 9.8 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information
6.15.2.3.1 External Fast Clock XTAL Specifications
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Supported frequencies 40 MHz
Frequency accuracy Initial + temperature + aging  ±25 ppm
Load Capacitance, CL (1) 5 13 pF
Equivalent series resistance, ESR 40 Ω
Drive level 100 uW
(1) Load capacitance, CL= [C1*C2] / [C1 + C2] + CP, where C1, C2 are the capacitors connected on HFXT_P and HFXT_M, respectively, and CP is the parasitic capacitance (typically 1 to 2 pF). For example, for C1 = C2 = 6.2pF and CP = 2pF, then CL = 5pF.