SWRZ143B December   2022  – December 2025 AWRL6432

 

  1.   1
  2. 1Introduction
  3. 2Device Nomenclature
  4. 3Device Markings
  5. 4Usage Notes
    1. 4.1 Power up sequence in power optimized topology
    2. 4.2 Meeting data sheet spec for 1.2V Digital LDO output path in BOM optimized topology
  6. 5Advisory to Silicon Variant / Revision Map
  7. 6Known Design Exceptions to Functional Specifications
    1. 6.1  ANA #48
    2. 6.2  ANA #49
    3. 6.3  ANA #50
    4. 6.4  ANA #51
    5. 6.5  ANA #52
    6. 6.6  ANA #57
    7. 6.7  DIG #1
    8. 6.8  DIG #2
    9. 6.9  DIG #3
    10. 6.10 DIG #4
    11. 6.11 DIG #5
    12. 6.12 DIG #6
    13. 6.13 DIG #7
    14. 6.14 DIG #8
    15. 6.15 DIG #9
    16. 6.16 DIG #10
    17. 6.17 DIG #14
    18. 6.18 DIG #15
    19. 6.19 DIG #16
  8. 7Trademarks
  9.   Revision History

6.3 ANA #50

GPADC based external signal monitor is not supported

Revision(s) Affected

AWRL6432 ES1.0

Details

Leakage current paths have been identified along the routing path to GPADC.

GPADC based external signal monitoring is not usable due to this issue.

Workaround

Only use external monitoring for voltages lower than 0.4V

This has been fixed in ES2.0