TIDUF03 December   2022

 

  1.   Description
  2.   Resources
  3.   Features
  4.   Applications
  5.   5
  6. 1System Description
    1. 1.1 Key System Specifications
  7. 2System Overview
    1. 2.1 Block Diagram
    2. 2.2 System Design Theory
      1. 2.2.1 Detection Principals
      2. 2.2.2 Saturation
      3. 2.2.3 General Mode of Operation
    3. 2.3 Highlighted Products
      1. 2.3.1 DRV8220
      2. 2.3.2 OPAx202
      3. 2.3.3 TLVx172
      4. 2.3.4 TLV7011
      5. 2.3.5 INA293
      6. 2.3.6 SN74LVC1G74
      7. 2.3.7 TLV767
  8. 3Hardware, Software, Testing Requirements, and Test Results
    1. 3.1 Hardware
      1. 3.1.1  Board Overview
      2. 3.1.2  Filter Stage
      3. 3.1.3  Differential to Single-Ended Converter
      4. 3.1.4  Low-Pass Filter
      5. 3.1.5  Full-Wave Rectifier
      6. 3.1.6  DC Offset Circuit
      7. 3.1.7  Auto-Oscillation Circuit
        1.       31
      8. 3.1.8  DRV8220 H-Bridge
      9. 3.1.9  Saturation Detection Circuit
      10. 3.1.10 H-Bridge Controlled by DFF
      11. 3.1.11 MCU Selection
      12. 3.1.12 Move Away From Timer Capture
      13. 3.1.13 Differentiating DC and AC From the Same Signal
      14. 3.1.14 Fluxgate Sensor
    2. 3.2 Software Requirements
      1. 3.2.1 Software Description for Fault Detection
    3. 3.3 Test Setup
      1. 3.3.1 Ground-Fault Simulation
    4. 3.4 Test Results
      1. 3.4.1 Linearity Over Temperature
    5. 3.5 Fault Response Results
  9. 4Design and Documentation Support
    1. 4.1 Design Files
      1. 4.1.1 Schematics
      2. 4.1.2 BOM
    2. 4.2 Documentation Support
    3. 4.3 Support Resources
    4. 4.4 Trademarks
  10. 5About the Author

3.1.10 H-Bridge Controlled by DFF

The digital flip-flop uses the output logic to control the DRV8220 output current direction. The flip-flop circuit changes output Q with each positive CLK edge.

GUID-20220801-SS0I-0WB0-8HW2-6XN4CWX3BHRV-low.gifFigure 3-15 DFF SN74LVC2G74 Circuit

Inverted output !Q is connected to input data D, so each positive clock edge inverts the outputs.