Figure 3-3 shows the different events that occur when sampling voltage and current, where the items in gray are done by the hardware settings and not the test software.

Figure 3-3 Voltage and Current Sampling Events

To go over the process mentioned in Figure 3-3, new current samples for each phase are ready every OSR, or 512 for this design, modulation clock cycles resulting 8000 samples per second over the SPI Bus to MSPM0+ MCU. Each sample contains 30 Bytes, with 3 Bytes data per ADC channel. Suppose the most recently ready phase current and voltage samples from the ADS131M08 device corresponds to the N^th – 1 current and voltage sample, or I_phx[N – 1] and V_phx[N – 1]. Once new samples are ready, the DRDY pin is asserted low by the ADS131M08. The falling edge on the DRDY pin on the ADS131M08 causes a GPIO port interrupt on the MSPM0+ MCU, which triggers the Port ISR, and the background process is run within the Port ISR. Figure 3-4 shows the background process, which mainly deals with timing-critical events in the test software.

Figure 3-4 Background Process

In the background process, the previously-obtained voltage samples (V_phx[N – 2]) and previously obtained current samples (I_phx[N – 2]) are stored so that these samples can be used later by the per_sample_dsp function, which is responsible for updating the intermediate dot product quantities used to calculate metrology parameters.

After the previously-obtained voltage and current samples are stored, communication to the ADS131M08 is enabled by asserting the chip select signal low. The DMA is then configured to both send a request for the newest current and voltage samples (I_phx[N – 1] and V_phx[N – 1]) of the ADS131M08 device and also to receive the data packet response from the ADS131M08. The request and reception of the current samples is done automatically by the DMA module.

Figure 3-5 shows the packet that is transmitted by the DMA of the MSPM0+ MCU and the response packet from the ADS131M08 that is received and assembled by the DMA as well. The transmission and reception packets contain 10 words, where each word is three bytes long, resulting in 30 Bytes DMA transaction over the SPI bus.

Figure 3-5 ADS131M08 ADC Sample Request Packet

When requesting the ADC data from the ADS131M08 device, the first word that has to be sent to the ADS131M08 is the command word. Since the test software does not need to change the settings of the ADS131M08 or read any registers during typical ADC sample readouts, a NULL command is sent to the ADS131M08, which allows the designer to get the ADC samples from the ADS131M08 without changing the state of the device. The actual size of the null command is 16-bits; however, since 24-bit words are used, the 16-bit command must be padded with an extra value of 0x00 at the end of the command. The NULL command word sent; therefore, has a value of 0x00 00 00. While the MSPM0+ MCU is shifting out the command word, the MCU is simultaneously shifting in the response word to the command word of the previous packet. The response word to a NULL command is the contents of the STATUS register. The contents of the STATUS register is not used in this design so the first word received from the ADS131M08 is ignored (not processed in the software code).

After writing the command word, it is necessary for a dummy write to be performed for each byte that is to be read. The dummy byte write is necessary to enable the SPI clock, which is necessary to read a byte from the ADS131M08 device. For each dummy byte write, a value of 0x00 is written to the SPI transmit register. Immediately after writing the command byte, writing three dummy bytes allows the MSPM0+ MCU to receive the 3-byte ADC value from channel 0 of the ADS131M08. Writing the next 21 dummy bytes gets the ADC data for channel 1, channel 2, and so on up, to channel 7, respectively. Finally, writing the next three dummy bytes gets the CRC word. The CRC word is 24-bits; however, note that the actual CRC is only 16-bits, which are placed in the most significant bits of the 24-bit word. As a result, when parsing the CRC word, the last byte is not needed (note though that the dummy write for this zero-padded byte must still be sent though for proper ADS131M08 operation).

Figure 3-3 shows that whenever the DMA has received the entire I_phx[N – 1] packet, the DMA ISR is automatically called. Within the ISR, the CRC is calculated over the nine command and ADC words (9 × 3 = 27 bytes in total). This CRC calculation can be done in two modes: either using the CRC module of the MSPM0G3507 MCU or using the memcpy() function to move the 27 Bytes ADC data to a special memory area where CRC16 is auto-calculated.

Both methods were successfully implemented in the test software, see the verify_add_CRC() routine. Here, the memcpy() implementation achieves almost 5 × faster calculation than using the CRC16 registers with bytewise feed and is used by default. The CRC module can be fed with 8- or 16-bit data, and since there are 27 bytes total, the CRC module is being updated byte for byte. Once the CRC has been calculated over the packet, the check is compared to the CRC obtained in the packet sent from the ADS131M08. The sent CRC is parsed from bytes 28 and 29 (byte 30 is the zero-padding for CRC16, so this byte value gets ignored).

If the calculated CRC and the parsed CRC are equal, then the CRC check passes and the ADC data is parsed to get the values of the voltage and current samples at time N – 1. The parsed voltage and current samples are put in temporary buffers so that this information is used the next time the per_sample_dsp function is called at the next interrupt. When the SPI transfer over DMA ends, the CS (chip select) line is automatically pulled back high again from the MSPM0+ MCU to properly reset the ADS131M08 communication before the next time current samples are ready for readout.

In parallel to transferring the latest current and voltage samples I_phx[N – 1] and V_phx[N – 1] to the MSPM0+ MCU using the DMA channels, the ADS131M08 is already sampling the next voltage (V_phx[N]) and current samples (I_phx[N]) while the test software performs per-sample processing on the earlier voltage (V_phx[N – 2]) and current samples (I_phx[N – 2] ) obtained from the ADS131M08. This per-sample processing is used to update the intermediate dot product quantities that are used to calculate the metrology parameters. After sample processing, the background process uses the "per_sample_energy_pulse_processing" for the calculation and output of energy-proportional pulses. Once the per_sample_energy_pulse_processing is completed, the test software exits from the port ISR.