TIDUF34A July   2023  – August 2025

 

  1.   1
  2.   Description
  3.   Resources
  4.   Features
  5.   Applications
  6.   6
  7. 1System Description
    1. 1.1 Key System Specifications
  8. 2System Overview
    1. 2.1 Block Diagram
    2. 2.2 Design Considerations
    3. 2.3 Highlighted Products
      1. 2.3.1  DP83TD510E
      2. 2.3.2  AM2434
      3. 2.3.3  TPS2660
      4. 2.3.4  TPS79801-Q1
      5. 2.3.5  MSP430FR2476
      6. 2.3.6  TLV7031
      7. 2.3.7  ATL431
      8. 2.3.8  LM74700-Q1
      9. 2.3.9  TPS62825A
      10. 2.3.10 TPS61023
      11. 2.3.11 TLVM13630
      12. 2.3.12 LSF0108
  9. 3System Design Theory
    1. 3.1 Power Supply
    2. 3.2 PoDL PD and Coupling Network
    3. 3.3 Sitara Technology Module
    4. 3.4 Boot Mode
    5. 3.5 PHI and BoosterPack Headers
  10. 4Hardware, Software, Testing Requirements, and Test Results
    1. 4.1 Hardware Requirements
      1. 4.1.1 Boot Switch Configuration
      2. 4.1.2 Reference Design Start-Up
    2. 4.2 Software Requirements
      1. 4.2.1 PD Firmware
      2. 4.2.2 MCU Firmware
    3. 4.3 Test Setup
    4. 4.4 Test Results
  11. 5Design and Documentation Support
    1. 5.1 Design Files
      1. 5.1.1 Schematics
      2. 5.1.2 BOM
    2. 5.2 Tools and Software
    3. 5.3 Documentation Support
    4. 5.4 Support Resources
    5. 5.5 Trademarks
  12. 6About the Author
  13. 7Revision History

3.1 Power Supply

The PoDL voltage, as well as the auxiliary input voltage are specified to be 24 V. Because we want to be able to use both supply inputs and do not want to feed back power but have no requirements on priority, the two rails are connected together with a diode OR. To reduce power consumption and voltage drop, this is done using two ideal diodes with the LM74700 device.

By using the Sitara processor on a module, the power tree for this part is simplified, because the module contains its own power tree and just needs a regulated 5-V input. Besides that, 1.8 V and 3.3 V need to be generated for the peripherals on board. The PHI interface is specified to have an additional 5.5-V rail so one more regulator is needed.


TIDA-010261 Power Supply Power Tree

Figure 3-2 Power Supply Power Tree

Because the system operates in power class 12, about 12 W is available. Only a few Watts are needed by the onboard electronics, but to have enough headroom for further extensions connected to either BoosterPack or PHI connector, the 5-V rail is designed to provide up to 3 A. For space reasons, a power module TLVM13630 is chosen.


TIDA-010261 5-V Regulator Schematic

Figure 3-3 5-V Regulator Schematic

The schematic shows the implementation, the undervoltage lockout can be programmed with R52 and R53. The output voltage is set with R49 and R51 to 5 V. A low current LED (D9) indicates the presence of output voltage.


TIDA-010261 3.3-V and 1.8-V Regulator Schematic

Figure 3-4 3.3-V and 1.8-V Regulator Schematic

For the 3.3 V and 1.8 V, the same regulator with different voltage divider is used as shown in Figure 3-4 The TPS62825A device gives a small solution with up to 2 A of output current. The presence of output voltage is signaled with an LED. The 1.8-V rail needs an additional transistor, because the forward voltage of the LED is more than 1.8 V. To keep the power-up sequence, the 3.3-V regulator gets the enable signal from the Sitara module, and signals the power good to the enable signal of the 1.8-V regulator, so they start up one after another. The 1.8-V power good signal can be used for further sequencing.


TIDA-010261 5.5-V Boost Regulator Schematic

Figure 3-5 5.5-V Boost Regulator Schematic

Figure 3-5 shows how the boost regulator is used to provide the 5.5 V to the PHI connector. Because the regulator is not always needed, the regulator can be enabled by GPIO0.30 from the Sitara processor. The TPS61023 is a synchronous boost regulator, so this device is able to turn the output off completely.

This boost regulator needs to be operated from the 3.3-V rail, because operating the regulator from 5 V violates the minimum on-time of the regulator. By using the 3.3 V as input voltage, the minimum on-time of the regulator is not violated.