TIDUF36A May   2023  – December 2023 DRV8328

 

  1.   1
  2.   Description
  3.   Resources
  4.   Features
  5.   Applications
  6.   6
  7. 1System Description
    1. 1.1 Key System Specifications
  8. 2System Overview
    1. 2.1 Block Diagram
    2. 2.2 Design Considerations
    3. 2.3 Highlighted Products
      1. 2.3.1 DRV8328C
      2. 2.3.2 MSPM0G1507
      3. 2.3.3 CSD18510Q5B
      4. 2.3.4 TMP61
  9. 3System Design Theory
    1. 3.1 Power Stage Design: Three-Phase Inverter
      1. 3.1.1 Selecting Sense Resistor
    2. 3.2 Power Stage Design: DRV8328 Gate Driver
      1. 3.2.1 DRV8328 Features
      2. 3.2.2 AVDD Linear Voltage Regulator (LDO)
    3. 3.3 Power Stage Design: MSPM0 Microcontroller
      1. 3.3.1 Low-Side Current Sensing With MSPM0G1507
      2. 3.3.2 Temperature Sensing
    4. 3.4 Power Stage Design: External Interface Options and Indications
      1. 3.4.1 Hall Sensor Interface
      2. 3.4.2 Input Power Voltage Monitoring
      3. 3.4.3 Motor Speed Control
      4. 3.4.4 Direction of Rotation: Digital Input
      5. 3.4.5 Programming Interface for MCU
      6. 3.4.6 Data Transmission
      7. 3.4.7 LED Indicators
      8. 3.4.8 Sleep Mode Entry Control
  10. 4Hardware, Software, Testing Requirements, and Test Results
    1. 4.1 Hardware Requirements
      1. 4.1.1 Hardware Board Overview
    2. 4.2 Software Requirements
    3. 4.3 Test Setup
    4. 4.4 Test Results
      1. 4.4.1 Functional Evaluation of DRV8328 Gate Driver
        1. 4.4.1.1 DRV8328 Linear Regulator Performance
        2. 4.4.1.2 Gate Drive Voltage Generated by Gate Driver
      2. 4.4.2 MOSFET Switching Waveforms
      3. 4.4.3 Current Open Loop Test
      4. 4.4.4 Current Open Loop Load Test
  11. 5Design and Documentation Support
    1. 5.1 Design Files
      1. 5.1.1 Schematics
      2. 5.1.2 BOM
    2. 5.2 Tools and Software
    3. 5.3 Documentation Support
    4. 5.4 Support Resources
    5. 5.5 Trademarks
  12. 6About the Author
  13. 7Revision History

4.4.1.2 Gate Drive Voltage Generated by Gate Driver

Figure 4-3 shows the gate drive output voltage of DRV8328 and the corresponding MCU PWM signals at a DC bus voltage of 18-V DC. The gate drive voltage is approximately 13 V, which means effective gate driving of standard MOSFETs.

Figure 4-4 shows the gate drive voltage of the DRV8328 at a DC bus voltage of 5 V, which can be the minimum voltage available from a discharged Li-ion battery. The gate drive output voltage is approximately 9 V.

  • CH1 (Blue): High-side VGS
  • CH2 (Cyan): Low-side VGS
GUID-20230516-SS0I-8LSH-BH6H-C8RHF5G3QCVZ-low.png Figure 4-3 High-Side and Low-Side VGS at 18-V DC
  • CH1 (Blue): High-side VGS
  • CH2 (Cyan): Low-side VGS
GUID-20230515-SS0I-CX6M-6CVV-CHQLMKDXJCHS-low.png Figure 4-4 High-Side and Low-Side VGS at 5-V DC