TIDUF49 February   2024

 

  1.   1
  2.   Description
  3.   Resources
  4.   Features
  5.   Applications
  6.   6
  7. 1System Description
    1. 1.1 Key System Specifications
  8. 2System Overview
    1. 2.1 System Block Diagram
    2. 2.2 Design Considerations
    3. 2.3 Highlighted Products
      1. 2.3.1 DP83RG720S-Q1 (Automotive SPE PHY)
      2. 2.3.2 TPS1HTC30-Q1 (HSS)
      3. 2.3.3 LM5157x-Q1 and LM5158x-Q1 (PSE PoDL Boost Converter)
      4. 2.3.4 LMR38020-Q1 (PD PoDL Buck Converter)
      5. 2.3.5 TPS629210-Q1 (PD 5.0V Rail Buck Converter)
      6. 2.3.6 TPS746-Q1 (PD PHY 3.3V Rail LDO)
      7. 2.3.7 TPS745-Q1 (PSE and PD PHY 1.0V Rail LDO)
  9. 3System Design Theory
    1. 3.1 System Design Consideration for TIDA-020060 (PSE)
      1. 3.1.1 Ethernet PHY
      2. 3.1.2 PHY Power Supply
      3. 3.1.3 PSE Specific PoDL Power Supply
    2. 3.2 System Design Consideration for TIDA-020061 (PD)
    3. 3.3 General Design Consideration for PoDL Coupling Decoupling Network
  10. 4Hardware, Software, Testing Requirements, and Test Results
    1. 4.1 Hardware Requirements
    2. 4.2 Software Requirements
    3. 4.3 Test Setup
    4. 4.4 Test Results
  11. 5Design and Documentation Support
    1. 5.1 Design Files
      1. 5.1.1 Schematics
      2. 5.1.2 BOM
      3. 5.1.3 PCB Layout Recommendations
    2. 5.2 Tools and Software
    3. 5.3 Documentation Support
    4. 5.4 Support Resources
    5. 5.5 Trademarks
  12. 6About the Author

1.1 Key System Specifications

Table 1-1, Table 1-2, and Table 1-3 show the key parameters of the design.

Table 1-1 System Key Parameters
PARAMETER CONNECTOR SPECIFICATION CONDITION DETAILS
VPoDL J1 PoDL voltage on the cable at PSE — 12V–48V
IPoDL J1 Maximal PoDL current on the cable — 1500mA
Bitrate J1 Communication speed over SPE — 1000MBit/s
BER J1 Bit error rate (BER) Cable length = 15m
VPoDL= 48V
IPoDL= 1500mA		 < 10–9errors/bit
Table 1-2 PSE Key Parameter
PARAMETER CONNECTOR SPECIFICATION CONDITION DETAILS
Vext_IN J14 External PoDL input voltage — 48V max.
Iext_IN J14 External PoDL input current — 1500mA max.
Table 1-3 PD Key Parameter
PARAMETER CONNECTOR SPECIFICATION CONDITION DETAILS
Vext_OUT J14 Output voltage for external devices — 12V
Iext_OUT J14 Output current for external devices — 1.75A max.