TIDUFA0A February   2025  – March 2025

 

  1.   1
  2.   Description
  3.   Resources
  4.   Features
  5.   Applications
  6.   6
  7. 1System Description
  8. 2System Overview
    1. 2.1 Block Diagram
    2. 2.2 Design Considerations
      1. 2.2.1 Switching Frequency
      2. 2.2.2 Design Size
      3. 2.2.3 Gate Resistors
      4. 2.2.4 Output Ripple
      5. 2.2.5 FET Placement
    3. 2.3 Highlighted Products
      1. 2.3.1 TPS7H5004-SP
      2. 2.3.2 TPS7H6023-SP
  9. 3Hardware, Testing Requirements, and Test Results
    1. 3.1 Hardware Requirements
    2. 3.2 Test Setup
    3. 3.3 Test Results
      1. 3.3.1 Efficiency Graphs
      2. 3.3.2 Bode Plot
      3. 3.3.3 Switching
      4. 3.3.4 Output Ripple
      5. 3.3.5 Gate Signals
      6. 3.3.6 Start-Up Sequence
      7. 3.3.7 Load Transient
      8. 3.3.8 Thermal Images
  10. 4Design and Documentation Support
    1. 4.1 Design Files
      1. 4.1.1 Schematics
      2. 4.1.2 BOM
    2. 4.2 Tools
    3. 4.3 Documentation Support
    4. 4.4 Support Resources
    5. 4.5 Trademarks
  11. 5About the Author
  12. 6Revision History

1 System Description

The TIDA-010958 reference design uses the TPS7H5004-SP, pulse-width modulation (PWM) controller, and TPS7H6023-SP gate driver, to create a synchronous buck converter. The design converts a 12V rail to a 0.8V rail intended for high-current FPGA designs and specifically to meet the regulation requirements of the AMD Versal™ AI Core XQRVC1902 core rail. A single TPS7H5004-SP provides a PWM output to two different TPS7H6023-SP devices which switch the FETs of the synchronous buck converter to provide voltage and current at the output. Each of the power stages delivers 40A for up to 80A total. Each gate driver drives one high-side FET and three low-side FETs. This reference design uses space-grade GaN FETs and a GaN gate driver.