Product details

Resolution (Bits) 16 Sample rate (max) (ksps) 512 Number of input channels 8 Interface type Parallel Architecture Delta-Sigma Input type Differential, Pseudo-Differential, Single-ended Rating Catalog Reference mode External Input voltage range (max) (V) 5 Input voltage range (min) (V) 0 Features Daisy-Chainable, Oscillator, Wideband Operating temperature range (°C) -40 to 125 Analog supply voltage (min) (V) 2.85 Analog supply voltage (max) (V) 5.5 SNR (dB) 110 Digital supply (min) (V) 1.65 Digital supply (max) (V) 1.95
Resolution (Bits) 16 Sample rate (max) (ksps) 512 Number of input channels 8 Interface type Parallel Architecture Delta-Sigma Input type Differential, Pseudo-Differential, Single-ended Rating Catalog Reference mode External Input voltage range (max) (V) 5 Input voltage range (min) (V) 0 Features Daisy-Chainable, Oscillator, Wideband Operating temperature range (°C) -40 to 125 Analog supply voltage (min) (V) 2.85 Analog supply voltage (max) (V) 5.5 SNR (dB) 110 Digital supply (min) (V) 1.65 Digital supply (max) (V) 1.95
VQFN (RSH) 56 49 mm² (7 mm × 7 mm)
  • Simultaneously measure four or eight channels
  • Wideband filter mode: up to 512kSPS
    • Linear phase response
    • ±0.0004dB pass-band ripple
    • 106dB stop-band attenuation
  • Low-latency filter mode: up to 1365kSPS
    • 3.9µs conversion latency
  • Power-scalable speed modes:
    • Max speed: 21mW/ch (512kSPS/1365kSPS)
    • High speed: 16mW/ch (400kSPS/1067kSPS)
    • Mid speed: 9mW/ch (200kSPS/533kSPS)
    • Low speed: 3mW/ch (50kSPS/133kSPS)
  • High precision:
    • SNR at 200kSPS: 97.7dB (typical)
    • THD: –115dB (typical)
    • INL: 0.5LSB (typical)
    • Offset drift: 60nV/°C (typical)
    • Gain drift: 1ppm/°C of FSR (typical)
  • Precharge buffered signal inputs
  • Bipolar or unipolar power supply operation
  • ±VREF or ±2VREF input ranges
  • Programmable by pin setting or SPI
  • Frame-sync port for output data
  • Internal or external clock operation
  • Analog supply voltage: 2.85V to 5.5V
  • Simultaneously measure four or eight channels
  • Wideband filter mode: up to 512kSPS
    • Linear phase response
    • ±0.0004dB pass-band ripple
    • 106dB stop-band attenuation
  • Low-latency filter mode: up to 1365kSPS
    • 3.9µs conversion latency
  • Power-scalable speed modes:
    • Max speed: 21mW/ch (512kSPS/1365kSPS)
    • High speed: 16mW/ch (400kSPS/1067kSPS)
    • Mid speed: 9mW/ch (200kSPS/533kSPS)
    • Low speed: 3mW/ch (50kSPS/133kSPS)
  • High precision:
    • SNR at 200kSPS: 97.7dB (typical)
    • THD: –115dB (typical)
    • INL: 0.5LSB (typical)
    • Offset drift: 60nV/°C (typical)
    • Gain drift: 1ppm/°C of FSR (typical)
  • Precharge buffered signal inputs
  • Bipolar or unipolar power supply operation
  • ±VREF or ±2VREF input ranges
  • Programmable by pin setting or SPI
  • Frame-sync port for output data
  • Internal or external clock operation
  • Analog supply voltage: 2.85V to 5.5V

The ADS117L14 (quad) and ADS117L18 (octal) are 16-bit, delta-sigma (ΔΣ), analog-to-digital converters (ADCs). The devices provide simultaneous sampling of four or eight channels with data rates up to 512kSPS (wideband filter mode) and 1365kSPS (low-latency filter mode). The 24-bit ADS127L14 (quad) and ADS127L18 (octal) ADCs are pin-compatible devices for increased resolution.

The ADS117L14 (quad) and ADS117L18 (octal) are 16-bit, delta-sigma (ΔΣ), analog-to-digital converters (ADCs). The devices provide simultaneous sampling of four or eight channels with data rates up to 512kSPS (wideband filter mode) and 1365kSPS (low-latency filter mode). The 24-bit ADS127L14 (quad) and ADS127L18 (octal) ADCs are pin-compatible devices for increased resolution.

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* Data sheet ADS117L1x 512kSPS, Quad and Octal, Simultaneous-Sampling, 16-Bit ΔΣ ADCs datasheet PDF | HTML May 23, 2025

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Evaluation board

ADS127L18EVM-PDK — ADS127L18 evaluation module

The ADS127L18EVM is a platform for evaluating the performance of the ADS127L18, an eight channel, 24-bit simultaneous-sampling delta-sigma analog-to-digital converter (ADC). The evaluation kit includes the ADS127L18EVM board and the precision host interface (PHI) controller board that enables the (...)
User guide: PDF | HTML
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Support software

ADS127L18-FPGA-EXAMPLE-CODE — ADS127L18 example FPGA code

Expedite your digital design using this example Verilog/RTL code for the ADS127L18 product family
Supported products & hardware
Support software

ADS127L18-MSPM0-EXAMPLE-CODE — ADS127L18 + MSPM0 example code

Expedite your design using this example C code for interfacing MSPM0 and the ADS127L18 product family.
Supported products & hardware
Simulation model

ADS117L14, ADS117L18, ADS127L14, ADS127L18 IBIS Model

SBAM524.ZIP (88 KB) - IBIS model
Supported products & hardware
Calculation tool

ANALOG-ENGINEER-CALC — PC software analog engineer's calculator

The analog engineer’s calculator is designed to speed up many of the repetitive calculations that analog circuit design engineers use on a regular basis. This PC-based tool provides a graphical interface with a list of various common calculations ranging from setting operational-amplifier (...)

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VQFN (RSH) 56 Ultra Librarian

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