DRA786

ACTIVE

Product details

Coprocessors 2 Dual Arm Cortex-M4 Display type 1 LCD OUT, 1 SD-DAC Protocols Ethernet PCIe 2 PCIe Gen2 Hardware accelerators 1 Audio Tracking Logic Features Multimedia Operating system Android, Linux, RTOS TI functional safety category Functional Safety-Compliant Rating Automotive Power supply solution LP873220-Q1, LP87332D-Q1, TPS65917-Q1, TPS65919-Q1 Operating temperature range (°C) -40 to 125 Edge AI enabled No
Coprocessors 2 Dual Arm Cortex-M4 Display type 1 LCD OUT, 1 SD-DAC Protocols Ethernet PCIe 2 PCIe Gen2 Hardware accelerators 1 Audio Tracking Logic Features Multimedia Operating system Android, Linux, RTOS TI functional safety category Functional Safety-Compliant Rating Automotive Power supply solution LP873220-Q1, LP87332D-Q1, TPS65917-Q1, TPS65919-Q1 Operating temperature range (°C) -40 to 125 Edge AI enabled No
FCBGA (ABF) 367 225 mm² (15 mm × 15 mm)
  • Architecture designed for infotainment applications
  • Up to 2 C66x floating-point VLIW DSP
    • Fully object-code compatible with C67x and C64x+
    • Up to thirty-two 16 × 16-bit fixed-point multiplies per cycle
  • Up to 512kB of on-chip L3 RAM
  • Level 3 (L3) and Level 4 (L4) interconnects
  • Memory Interface (EMIF) module
    • Supports DDR3/DDR3L up to DDR-1066
    • Supports DDR2 up to DDR-800
    • Up to 2GB supported
  • Dual Arm® Cortex®-M4 (IPU)
  • Vision accelerationPac
    • Embedded Vision Engine (EVE)
  • Display subsystem
    • Display controller with DMA engine
    • CVIDEO / SD-DAC TV analog composite output
  • On-chip temperature sensor that is capable of generating temperature alerts
  • General-Purpose Memory Controller (GPMC)
  • Enhanced Direct Memory Access (EDMA) controller
  • 3-port (2 external) Gigabit Ethernet (GMAC) switch
  • Controller Area Network (DCAN) module
    • CAN 2.0B protocol
  • Modular Controller Area Network (MCAN) module
    • CAN 2.0B protocol
  • Eight 32-bit general-purpose timers
  • Three configurable UART modules
  • Four Multichannel Serial Peripheral Interfaces (McSPI)
  • Quad SPI interface
  • Two Inter-Integrated Circuit (I2C™) ports
  • Three Multichannel Audio Serial Port (McASP) modules
  • Secure Digital Input Output Interface (SDIO)
  • Up to 126 General-Purpose I/O (GPIO) pins
  • Power, reset, and clock management
  • On-chip debug with CTools technology
  • Automotive AEC-Q100 qualified
  • 15 × 15 mm, 0.65-mm pitch, 367-pin PBGA (ABF)
  • Five instances of Real-Time Interrupt (RTI) modules that can be used as watch dog timers
  • 8-channel 10-bit ADC
  • PWMSS
  • Video and image processing support
    • Full-HD video (1920 × 1080p, 60 fps)
    • Video input and video output
    • GPIOs when not used for video
  • Video Input Port (VIP) module
    • Support for up to 4 multiplexed input ports
  • Architecture designed for infotainment applications
  • Up to 2 C66x floating-point VLIW DSP
    • Fully object-code compatible with C67x and C64x+
    • Up to thirty-two 16 × 16-bit fixed-point multiplies per cycle
  • Up to 512kB of on-chip L3 RAM
  • Level 3 (L3) and Level 4 (L4) interconnects
  • Memory Interface (EMIF) module
    • Supports DDR3/DDR3L up to DDR-1066
    • Supports DDR2 up to DDR-800
    • Up to 2GB supported
  • Dual Arm® Cortex®-M4 (IPU)
  • Vision accelerationPac
    • Embedded Vision Engine (EVE)
  • Display subsystem
    • Display controller with DMA engine
    • CVIDEO / SD-DAC TV analog composite output
  • On-chip temperature sensor that is capable of generating temperature alerts
  • General-Purpose Memory Controller (GPMC)
  • Enhanced Direct Memory Access (EDMA) controller
  • 3-port (2 external) Gigabit Ethernet (GMAC) switch
  • Controller Area Network (DCAN) module
    • CAN 2.0B protocol
  • Modular Controller Area Network (MCAN) module
    • CAN 2.0B protocol
  • Eight 32-bit general-purpose timers
  • Three configurable UART modules
  • Four Multichannel Serial Peripheral Interfaces (McSPI)
  • Quad SPI interface
  • Two Inter-Integrated Circuit (I2C™) ports
  • Three Multichannel Audio Serial Port (McASP) modules
  • Secure Digital Input Output Interface (SDIO)
  • Up to 126 General-Purpose I/O (GPIO) pins
  • Power, reset, and clock management
  • On-chip debug with CTools technology
  • Automotive AEC-Q100 qualified
  • 15 × 15 mm, 0.65-mm pitch, 367-pin PBGA (ABF)
  • Five instances of Real-Time Interrupt (RTI) modules that can be used as watch dog timers
  • 8-channel 10-bit ADC
  • PWMSS
  • Video and image processing support
    • Full-HD video (1920 × 1080p, 60 fps)
    • Video input and video output
    • GPIOs when not used for video
  • Video Input Port (VIP) module
    • Support for up to 4 multiplexed input ports

The DRA78x processor is offered in a 367-ball, 15×15-mm, 0.65-mm ball pitch (0.8 mm spacing rules can be used on signals) with Via Channel™ Array (VCA) technology, ball grid array (FCBGA) package.

The architecture is designed to deliver high-performance concurrencies for automotive co-processor, hybrid radio and amplifier applications in a cost-effective solution, providing full scalability from the DRA75x ("Jacinto 6 EP" and "Jacinto 6 Ex"), DRA74x "Jacinto 6", DRA72x "Jacinto 6 Eco", and DRA71x "Jacinto 6 Entry" family of infotainment processors.

Additionally, Texas Instruments (TI) provides a complete set of development tools for the Arm, and DSP, including C compilers and a debugging interface for visibility into source code execution.

The DRA78x Jacinto 6 RSP (Radio Sound Processor) device family is qualified according to the AEC-Q100 standard.

The device features a simplified power supply rail mapping which enables lower cost PMIC solutions.

The DRA78x processor is offered in a 367-ball, 15×15-mm, 0.65-mm ball pitch (0.8mm spacing rules can be used on signals) with Via Channel™ Array (VCA) technology, ball grid array (FCBGA) package.

The architecture is designed to deliver high-performance concurrencies for automotive co-processor, hybrid radio and amplifier applications in a cost-effective solution, providing full scalability from the DRA75x ("Jacinto 6 EP" and "Jacinto 6 Ex"), DRA74x "Jacinto 6", DRA72x "Jacinto 6 Eco", and DRA71x "Jacinto 6 Entry" family of infotainment processors.

Additionally, Texas Instruments (TI) provides a complete set of development tools for the Arm, and DSP, including C compilers and a debugging interface for visibility into source code execution.

The DRA78x Jacinto 6 RSP (Radio Sound Processor) device family is qualified according to the AEC-Q100 standard.

The device features a simplified power supply rail mapping which enables lower cost PMIC solutions.

The DRA78x processor is offered in a 367-ball, 15×15-mm, 0.65-mm ball pitch (0.8 mm spacing rules can be used on signals) with Via Channel™ Array (VCA) technology, ball grid array (FCBGA) package.

The architecture is designed to deliver high-performance concurrencies for automotive co-processor, hybrid radio and amplifier applications in a cost-effective solution, providing full scalability from the DRA75x ("Jacinto 6 EP" and "Jacinto 6 Ex"), DRA74x "Jacinto 6", DRA72x "Jacinto 6 Eco", and DRA71x "Jacinto 6 Entry" family of infotainment processors.

Additionally, Texas Instruments (TI) provides a complete set of development tools for the Arm, and DSP, including C compilers and a debugging interface for visibility into source code execution.

The DRA78x Jacinto 6 RSP (Radio Sound Processor) device family is qualified according to the AEC-Q100 standard.

The device features a simplified power supply rail mapping which enables lower cost PMIC solutions.

The DRA78x processor is offered in a 367-ball, 15×15-mm, 0.65-mm ball pitch (0.8mm spacing rules can be used on signals) with Via Channel™ Array (VCA) technology, ball grid array (FCBGA) package.

The architecture is designed to deliver high-performance concurrencies for automotive co-processor, hybrid radio and amplifier applications in a cost-effective solution, providing full scalability from the DRA75x ("Jacinto 6 EP" and "Jacinto 6 Ex"), DRA74x "Jacinto 6", DRA72x "Jacinto 6 Eco", and DRA71x "Jacinto 6 Entry" family of infotainment processors.

Additionally, Texas Instruments (TI) provides a complete set of development tools for the Arm, and DSP, including C compilers and a debugging interface for visibility into source code execution.

The DRA78x Jacinto 6 RSP (Radio Sound Processor) device family is qualified according to the AEC-Q100 standard.

The device features a simplified power supply rail mapping which enables lower cost PMIC solutions.

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Technical documentation

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Top documentation Type Title Format options Date
* Data sheet DRA78x Infotainment Applications Processor datasheet (Rev. H) PDF | HTML Feb 4, 2020
* User guide DRA78x Technical Reference Manual (Rev. D) Jul 30, 2019
* Errata DRA78x Silicon Errata (Rev. B) Oct 1, 2019
Application note Integrating virtual DRM between VISION SDK and PSDK on Jacinto6 SOC PDF | HTML May 5, 2021
Application note IVA-HD Sharing Between VISION-SDK and PSDKLA on Jacinto6 SoC PDF | HTML Aug 24, 2020
Application note AM57x, DRA7x, and TDA2x EMIF Tools (Rev. E) Jan 6, 2020
Application note Integrating New Cameras With Video Input Port on DRA7xx SoCs PDF | HTML Jun 11, 2019
Application note Achieving Early CAN Response on DRA7xx Devices Nov 28, 2018
Application note DRA74x_75x/DRA72x Performance (Rev. A) Oct 31, 2018
Application note Audio Post Processing Engine on Jacinto™ DRA7x Family of Devices Sep 14, 2018
Application note The Implementation of YUV422 Output for SRV Aug 2, 2018
Application note MMC DLL Tuning (Rev. B) Jul 31, 2018
Application note Integrating AUTOSAR on TI SoC: Fundamentals Jun 18, 2018
Application note ECC/EDC on TDAxx (Rev. B) Jun 13, 2018
Application note Tools and Techniques to Root Case Failures in Video Capture Subsystem Jun 12, 2018
Application note Sharing VPE Between VISIONSDK and PSDKLA May 4, 2018
Application note Android Boot Optimization on DRA7xx Devices (Rev. A) Feb 13, 2018
Application note Using Peripheral Boot and DFU for Rapid Development on Jacinto 6 Devices (Rev. A) Nov 30, 2017
Application note Jacinto6 Spread Spectrum Clocking Configuration (Rev. A) Nov 27, 2017
Application note Optimizing DRA7xx and TDA2xx Processors for use with Video Display SERDES (Rev. B) Nov 7, 2017
Application note A Guide to Debugging With CCS on the DRA75x, DRA74x, TDA2x and TDA3x Family of D (Rev. B) Nov 3, 2017
Application note Optimization of GPU-Based Surround View on TI’s TDA2x SoC Sep 12, 2017
Application note Using DSS Write-Back Pipeline for RGB-to-YUV Conversion on DRA7xx Devices Aug 14, 2017
Application note Software Guidelines to EMIF/DDR3 Configuration on DRA7xx Devices Jul 12, 2017
Application note Linux Boot Time Optimizations on DRA7xx Devices Mar 31, 2017
Application note Interfacing DRA75x and DRA74x Audio to Analog Codecs (Rev. A) Feb 17, 2017
Application note Early Splash Screen on DRA7x Devices Jan 31, 2017
Application note Quality of Service (QoS) Knobs for DRA74x, DRA75x & TDA2x Family of Devices (Rev. A) Dec 15, 2016
Application note Gstreamer Migration Guidelines Apr 26, 2016
Application note Flashing Binaries to DRA7xx Factory Boards Using DFU Apr 14, 2016
Application note Tools and Techniques for Audio Debugging Apr 13, 2016
Application note Debugging Tools and Techniques With IPC3.x Mar 30, 2016
Application note Modifying Memory Usage for IPUMM Applications Loaded IPC 3.x for DRA75x, DRA74x (Rev. A) Jan 15, 2016
White paper Informational ADAS as Software Upgrade to Today’s Infotainment Systems Oct 14, 2014
Application note Guide to fix Perf Issues Using QoS Knobs for DRA74x, DRA75x, TDA2x & TD3x Device Aug 13, 2014
White paper Today’s high-end infotainment soon becoming mainstream Jun 2, 2014

Design & development

Power-supply solutions

Find available power-supply solutions for the DRA786. TI offers power-supply solutions for TI and non-TI systems on a chip (SoCs), processors, microcontrollers, sensors, and field-programmable gate arrays (FPGAs).

Evaluation board

DRA78XEVM — DRA78x Evaluation Module

The Jacinto™ DRA78x evaluation module (EVM) is an evaluation platform designed to speed up development efforts and reduce time-to-market for Radio Signal Processor (RSP) applications. The EVM is based on the Jacinto DRA78x SoC, which incorporates a heterogeneous, scalable architecture (...)

User guide: PDF
Supported products & hardware
Debug probe

LB-3P-TRACE32-DSP — Lauterbach TRACE32 Debug and Trace System for Digital Signal Processors (DSPs)

Lauterbach‘s TRACE32® tools are a suite of leading-edge hardware and software components that enables developers to analyze, optimize and certify all kinds of single- or multi-core Digital Signal processors (DSPs) which are a popular choice for audio and video processing as well as radar data (...)

Supported products & hardware
Software development kit (SDK)

PROCESSOR-SDK-ANDROID-AUTOMOTIVE-DRA7X

Processor SDK Linux Automotive

Processor SDK Linux Automotive is the foundational software development platform for TI's Jacinto™ DRAx family of Infotainment SoCs. The software framework allows users to develop feature-rich Infotainment solutions such as reconfigurable digital instrument (...)

Supported products & hardware
Software development kit (SDK)

PROCESSOR-SDK-LINUX-AUTOMOTIVE-DRA7X — PROCESSOR-SDK-LINUX-AUTOMOTIVE-DRA7X

Processor SDK Linux Automotive

Processor SDK Linux Automotive is the foundational software development platform for TI's Jacinto™ DRAx family of Infotainment SoCs. The software framework allows users to develop feature-rich Infotainment solutions such as reconfigurable digital instrument (...)

Supported products & hardware
Software development kit (SDK)

PROCESSOR-SDK-RTOS-AUTOMOTIVE-DRA7X

Processor SDK Linux Automotive

Processor SDK Linux Automotive is the foundational software development platform for TI's Jacinto™ DRAx family of Infotainment SoCs. The software framework allows users to develop feature-rich Infotainment solutions such as reconfigurable digital instrument (...)

Supported products & hardware
IDE, configuration, compiler or debugger

SYSCONFIG — Standalone desktop version of SysConfig

CCStudio™ SysConfig is part of TI's extensive CCStudio™ development ecosystem and is a configuration tool that simplifies hardware and software configuration challenges to accelerate software development.

SysConfig provides an intuitive graphical user interface for configuring pins, peripherals, (...)

Supported products & hardware
Operating system (OS)

GHS-INTEGRITY-RTOS — Green Hills INTEGRITY RTOS

The INTEGRITY RTOS from Green Hills Software is the safe and secure foundation for running critical applications and guest operating systems on TI processors using Arm® Cortex-A cores. Its certified separation kernel runs software within protected partitions with certified (...)

Supported products & hardware
Support software

VCTR-3P-MICROSAR — Vector MICROSAR AUTOSAR software for microcontrollers and high-performance computers (HPCs)

MICROSAR and DaVinci product families simplify ECU development with sophisticated embedded software and powerful development tools for both microcontrollers and HPCs. With advanced infrastructure software, you create an optimal basis for your ECUs and simplify all accompanying development tasks (...)

Supported products & hardware
Simulation model

DRA78x BSDL Model

SPRM713.ZIP (9 KB) - BSDL model
Supported products & hardware
Simulation model

DRA78x IBIS Model

SPRM703.ZIP (10940 KB) - IBIS model
Supported products & hardware
Simulation model

DRA78x Thermal Model

SPRM704.ZIP (1 KB) - Thermal model
Supported products & hardware
Calculation tool

CLOCKTREETOOL — Clock Tree Tool for Sitara, Automotive, Vision Analytics, & Digital Signal Processors


The Clock Tree Tool (CTT) for ARM Processors & Digital Signal Processors is an interactive configuration software tool that provides information about device clock tree architecture. This tool allows visualization of the device clock tree. It can also be used to determine the exact register (...)

Supported products & hardware
Package Pins CAD symbols, footprints & 3D models
FCBGA (ABF) 367 Ultra Librarian

Ordering & quality

Recommended products may have parameters, evaluation modules or reference designs related to this TI product.

Support & training

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