The LM656x0-Q1 is a synchronous buck DC/DC converter offered from a family of
devices with mitigated interference and noise technology using architecture 1
features (MINT 1) that enable low EMI, high power density, and excellent conversion
efficiency. Integrated power MOSFETs with low RDS(on) enable up to 8A of
output current across a wide VIN range of 3.5V to 65V (with transients to 70V).
Phase stackable with synchronized
interleaving, the peak current-mode control architecture of the LM656x0-Q1 supports accurate current sharing with
paralleled phases for higher output currents. AUTO mode enables frequency foldback
during light-load operation, giving high light-load efficiency and a no-load input
current as low as 2.2µA, which extends operating run-time in battery-powered
systems.
A high-side switch minimum on-time of
36ns facilitates large step-down ratios, enabling the direct conversion from 24V or
48V automotive inputs to low-voltage rails
for reduced system cost and complexity. The package has several NC pins between
critical power pins, which improve the Failure Modes and Effects Analysis (FMEA)
result.
The LM656x0-Q1 includes several features to simplify
compliance with CISPR 25 and automotive emissions requirements.
First, a symmetrical pinout provides excellent input capacitor placement and enables
an ultra-low effective value for the power-loop parasitic inductance, which reduces
switching losses and improves EMI performance at high input voltage and high
switching frequency. A pin-selectable switch-node slew-rate control feature further
reduces emissions at high frequencies. To lower input capacitor
ripple current and EMI filter size, interleaved operation using a SYNCOUT signal
with 180° phase shift works well for cascaded, multichannel or multiphase
designs. Resistor-adjustable switching frequency as high as 2.2MHz can be
synchronized to an external clock source to eliminate beat frequencies in
noise-sensitive applications. Finally, the LM656x0-Q1
has dual-random spread spectrum (DRSS), a unique EMI-reduction feature that combines
low-frequency triangular and high-frequency random modulations to mitigate
disturbances across lower and higher frequency bands, respectively.
Additional
features of the LM656x0-Q1 include 150°C maximum
junction temperature operation, open-drain power-good (PG) indicator for fault
reporting and output voltage monitoring, precision enable input for input UVLO
protection, monotonic start-up into prebiased loads, dual-input VCC bias
subregulator powered from VIN or BIAS, hiccup-mode overload protection, and thermal
shutdown protection with automatic recovery.
The LM656x0-Q1
is qualified to AEC-Q100 grade 1 for automotive
applications and comes in a 4.5mm × 4.5mm, thermally enhanced, 26-pin eQFN
package with additional pin clearance for increased reliability. Also included are
wettable-flank pins to facilitate optical inspection during manufacturing.
Leveraging a flip-chip routable leadframe (FCRLF) packaging technique, the LM656x0-Q1 with useable current, lifetime reliability,
and cost advantages targets applications requiring high power density. The wide
input voltage range, low quiescent current consumption, high-temperature operation,
cycle-by-cycle current limit, low EMI signature, and small design size provide an
excellent point-of-load regulator design for applications requiring enhanced
robustness and durability.
The LM656x0-Q1 is a synchronous buck DC/DC converter offered from a family of
devices with mitigated interference and noise technology using architecture 1
features (MINT 1) that enable low EMI, high power density, and excellent conversion
efficiency. Integrated power MOSFETs with low RDS(on) enable up to 8A of
output current across a wide VIN range of 3.5V to 65V (with transients to 70V).
Phase stackable with synchronized
interleaving, the peak current-mode control architecture of the LM656x0-Q1 supports accurate current sharing with
paralleled phases for higher output currents. AUTO mode enables frequency foldback
during light-load operation, giving high light-load efficiency and a no-load input
current as low as 2.2µA, which extends operating run-time in battery-powered
systems.
A high-side switch minimum on-time of
36ns facilitates large step-down ratios, enabling the direct conversion from 24V or
48V automotive inputs to low-voltage rails
for reduced system cost and complexity. The package has several NC pins between
critical power pins, which improve the Failure Modes and Effects Analysis (FMEA)
result.
The LM656x0-Q1 includes several features to simplify
compliance with CISPR 25 and automotive emissions requirements.
First, a symmetrical pinout provides excellent input capacitor placement and enables
an ultra-low effective value for the power-loop parasitic inductance, which reduces
switching losses and improves EMI performance at high input voltage and high
switching frequency. A pin-selectable switch-node slew-rate control feature further
reduces emissions at high frequencies. To lower input capacitor
ripple current and EMI filter size, interleaved operation using a SYNCOUT signal
with 180° phase shift works well for cascaded, multichannel or multiphase
designs. Resistor-adjustable switching frequency as high as 2.2MHz can be
synchronized to an external clock source to eliminate beat frequencies in
noise-sensitive applications. Finally, the LM656x0-Q1
has dual-random spread spectrum (DRSS), a unique EMI-reduction feature that combines
low-frequency triangular and high-frequency random modulations to mitigate
disturbances across lower and higher frequency bands, respectively.
Additional
features of the LM656x0-Q1 include 150°C maximum
junction temperature operation, open-drain power-good (PG) indicator for fault
reporting and output voltage monitoring, precision enable input for input UVLO
protection, monotonic start-up into prebiased loads, dual-input VCC bias
subregulator powered from VIN or BIAS, hiccup-mode overload protection, and thermal
shutdown protection with automatic recovery.
The LM656x0-Q1
is qualified to AEC-Q100 grade 1 for automotive
applications and comes in a 4.5mm × 4.5mm, thermally enhanced, 26-pin eQFN
package with additional pin clearance for increased reliability. Also included are
wettable-flank pins to facilitate optical inspection during manufacturing.
Leveraging a flip-chip routable leadframe (FCRLF) packaging technique, the LM656x0-Q1 with useable current, lifetime reliability,
and cost advantages targets applications requiring high power density. The wide
input voltage range, low quiescent current consumption, high-temperature operation,
cycle-by-cycle current limit, low EMI signature, and small design size provide an
excellent point-of-load regulator design for applications requiring enhanced
robustness and durability.