Packaging information
| Package | Pins VQFN (RGF) | 40 |
| Operating temperature range (°C) -40 to 125 |
| Package qty | Carrier 250 | SMALL T&R |
Features for the TDP2004-Q1
- Automotive Q100 qualified
- –40 to 105°C (grade 2) ambient temperature support without heatsink
- Supports DisplayPort 2.1 up to 20Gbps (UHBR20)
- Integrated cross-point mux suitable for USB-C Alternate Mode
- Supports AC coupled HDMI 2.1 source up to 12Gbps
- Protocol agnostic linear equalizer supporting most AC coupled interfaces up to 20Gbps
- Excellent electrical performance at 20Gbps (10GHz Nyquist):
- 20dB equalization
- 1.65V DC linearity, 1.1V AC linearity
- –11 / –18dB Rx / Tx return loss
- 70fs low additive RJ with PRBS data
- Transparent to DisplayPort or HDMI FRL link training
- Single 3.3V supply with 160mW/chan active power
- Internal voltage regulator provides immunity to supply noise
- High linearity easing DP compliance ratio tests
- High BW resulting excellent linear EQ curves
- Pin-strap, I2C or EEPROM programming
- 18 EQ boost and 5 flat gain settings
Description for the TDP2004-Q1
The TDP2004-Q1 is a four-channel low-power high-performance linear repeater or redriver designed to support DisplayPort 2.1 up to 20Gbps and AC coupled HDMI2.1 Source up to 12Gbps.
The TDP2004-Q1 receivers deploy continuous time linear equalizers (CTLE) to provide a programmable high-frequency boost. The equalizer can open an input eye that is completely closed due to inter-symbol interference (ISI) induced by an interconnect medium, such as PCB traces or cables. The linear data-paths of TDP2004-Q1 preserve transmit preset signal characteristics. High bandwidth, low channel-to-channel cross-talk, low additive jitter and excellent return loss makes the device almost a passive element in the link, but with useful equalization. The DisplayPort link training is effective through the linear redriver that becomes part of the passive channel in between source Tx and sink Rx. This transparency in the link training protocol results in optimum electrical link and lowest possible latency. The data-path of the device uses an internally regulated power rail that provides high immunity to any supply noise on the board.
The device also has low AC and DC gain variation providing consistent equalization in high volume platform deployment.