Packaging information
| Package | Pins HTQFP (PZP) | 100 |
| Operating temperature range (°C) 0 to 70 |
| Package qty | Carrier 90 | JEDEC TRAY (10+1) |
Features for the TFP403
- Supports Pixel Rates Up to 165MHz
(Including 1080p and WUXGA at 60 Hz) - Digital Visual Interface (DVI 1.0)
Specification Compliant(1) - Pin-for-Pin Compatible With TFP501 for
Simple Upgrade Path to HDCP2 - True-Color, 24 Bit/Pixel, 16.7M Colors at
1 or 2-Pixels per Clock - Laser Trimmed (50 Ω) Input Stage for
Optimum Fixed Impedance Matching - Skew Tolerant up to One Pixel Clock Cycle
(High Clock and Data Jitter Tolerance) - 4x Over-Sampling for Reduced Bit-Error Rates and
Better Performance Over Longer Cables - Reduced Power Consumption—1.8-V Core
Operation With 3.3 V I/Os and Supplies3 - Reduced Ground Bounce Using Time Staggered Pixel Outputs
- Lowest Noise and Best Power Dissipation
Using PowerPAD™ Packaging - Advanced Technology Using TI 0.18-µm
EPIC-5™ CMOS Process - Supports Hot Plug Detection
(1) The Digital Visual Interface Specification (DVI) is an industry standard developed by the Digital Display Working Group (DDWG) for high-speed digital connection to digital displays. The TFP403 is compliant with the DVI Specification Rev. 1.0.
2 High-bandwidth digital content protection (HDCP) is the system used for protecting DVI outputs from being copied. The TFP501 is TI’s DVI receiver with HDCP functionality.
3 The TFP403 has an internal voltage regulator that provides the 1.8-V core power supply from the externally supplied 3.3-V supplies.
PanelBus, PowerPAD, and EPIC-5 are trademarks of Texas Instruments.
Description for the TFP403
The Texas Instruments TFP403 is a PanelBus™ flat panel display products, part of a comprehensive family of end-to-end DVI 1.0 compliant solutions. Targeted primarily at desktop LCD monitors and digital projectors, the TFP403 finds applications in any design requiring high-speed digital interface.
The TFP403 supports display resolutions up to 1080p and WUXGA in 24-bit true color pixel format. The TFP403 offers design flexibility to drive one or two pixels per clock, supports TFT or DSTN panels, and provides an option for time staggered pixel outputs for reduced ground bounce.
PowerPAD advanced packaging technology results in best of class power dissipation, footprint, and ultralow ground inductance.
The TFP403 combines PanelBus™ circuit innovation with TIs advanced 0.18-µm EPIC-5™ CMOS process technology, along with PowerPAD™ package technology to achieve a reliable, low-powered, low-noise, high-speed digital interface solution.