Packaging information
| Package | Pins DSBGA (YCG) | 15 |
| Operating temperature range (°C) -20 to 85 |
| Package qty | Carrier 3,000 | LARGE T&R |
Features for the TUSB2E11
- USB 2.0 and eUSB2 (rev 1.2) compliant
- Low-speed, full-speed, high-speed signaling
- Best-in-class high-speed total jitter of 20ps
- Register access protocol receptor capable
- Host and device mode (dual-role device) support
- Auto detection for I2C or strap-pin options
- Three strap-pins for USB 2.0 high-speed channel compensation settings
- I2C device interface for more configurations
- Device variants
- eUSB2 1.0V or 1.2V signaling interface
- eUSB2 trace loss compensation levels for different product form-factors
- 1.2V or 1.8V I2C interface
- Optional battery charging and detection support
- BC 1.2 CDP or DCP divider mode advertising
- Data-aware USB Type-C™ compatible BC 1.2 SDP, CDP, and DCP divider mode detection
- Dual-role auto switching between charger advertising or detection
- CTA-936 USB Carkit UART support
- Supports auto-resume ECR as well as L2 interrupt resume mode
- Optional GPIOs: interrupt GPIO2, debug, I2C ↔ GPIO0/1
- I2C accessible debug capabilities for manufacturing tests
Description for the TUSB2E11
The TUSB2E11 is a USB compliant eUSB2 to USB 2.0 repeater supporting both device and host modes.
The device supports USB low-speed (LS), full-speed (FS) signals, and high-speed (HS) signals.
The device has multiple patented designs to provide robust interoperability, optimum performance, and power.
For systems without an I2C interface, the device offers eight individual settings with three strap-pins for USB 2.0 channel Equivalent Series Resistance (ESR) up to 20Ω. Device variants are available for different levels of eUSB2 trace length compensation up to 10 inches.
The I2C interface permits additional flexibility for fine tuning of device RX equalization and TX amplitude, slew rate and pre-emphasis to pass electrical compliance tests and compensate for channel loss.
Various debug options are available through the three GPIO pins that can be configured to monitor various USB bus states or interrupt as well as CTA-936 UART mode that can provide SoC debug capabilities. GPIO0 and GPIO1 can be used as general purpose I2C to GPIOs bridge.