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UC1856-SP

ACTIVE

QML-V, 40V input, 1.5A dual-output 1MHz PWM controller

Product details

Topology Boost, Flyback, Forward, Full bridge, Half bridge, Push pull Control mode Current Features Error amplifier, Multi-topology, Soft start, Synchronization pin Duty cycle (max) (%) 50
Topology Boost, Flyback, Forward, Full bridge, Half bridge, Push pull Control mode Current Features Error amplifier, Multi-topology, Soft start, Synchronization pin Duty cycle (max) (%) 50
CDIP (J) 16 135.3552 mm² (— mm × — mm) CFP (HKT) 16 72.136 mm² (0 mm × 0 mm)
  • Pin-for-Pin Compatible With the UC1846
  • 65-ns Typical Delay From Shutdown to Outputs,
    and 50-ns Typical Delay From SYNC to Outputs
  • Improved Current-Sense Amplifier With
    Reduced Noise Sensitivity
  • Differential Current Sense with 3-V Common-Mode Range
  • Trimmed-Oscillator Discharge Current for Accurate
    Deadband Control
  • Accurate 1-V Shutdown Threshold
  • High-Current Dual Totem-Pole Outputs (1.5-A peak)
  • TTL Compatible Oscillator SYNC Pin Thresholds
  • 4-kV ESD Protection
  • Pin-for-Pin Compatible With the UC1846
  • 65-ns Typical Delay From Shutdown to Outputs,
    and 50-ns Typical Delay From SYNC to Outputs
  • Improved Current-Sense Amplifier With
    Reduced Noise Sensitivity
  • Differential Current Sense with 3-V Common-Mode Range
  • Trimmed-Oscillator Discharge Current for Accurate
    Deadband Control
  • Accurate 1-V Shutdown Threshold
  • High-Current Dual Totem-Pole Outputs (1.5-A peak)
  • TTL Compatible Oscillator SYNC Pin Thresholds
  • 4-kV ESD Protection

The UC1856 is a high-performance version of the popular UC1846 series of current-mode controllers, and is intended for both design upgrades and new applications where speed and accuracy are important. All input-to-output delays have been minimized, and the current sense output is slew-rate limited to reduce noise sensitivity. Fast 1.5-A peak output stages have been added to allow rapid switching of power FETs.

A low-impedance TTL-compatible sync output has been implemented with a TRI-STATE function when used as a sync input.

Internal-chip grounding has been improved to minimize internal noise caused when driving large capacitive loads. This improvement, in conjunction with the improved differential current-sense amplifier, results in enhanced noise immunity.

Other features include a trimmed oscillator current (8%) for accurate frequency and dead-time control; a 1-V 5% shutdown threshold; and 4-kV minimum electrostatic discharge (ESD) protection on all pins.

The UC1856 is a high-performance version of the popular UC1846 series of current-mode controllers, and is intended for both design upgrades and new applications where speed and accuracy are important. All input-to-output delays have been minimized, and the current sense output is slew-rate limited to reduce noise sensitivity. Fast 1.5-A peak output stages have been added to allow rapid switching of power FETs.

A low-impedance TTL-compatible sync output has been implemented with a TRI-STATE function when used as a sync input.

Internal-chip grounding has been improved to minimize internal noise caused when driving large capacitive loads. This improvement, in conjunction with the improved differential current-sense amplifier, results in enhanced noise immunity.

Other features include a trimmed oscillator current (8%) for accurate frequency and dead-time control; a 1-V 5% shutdown threshold; and 4-kV minimum electrostatic discharge (ESD) protection on all pins.

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Limited design support from TI available

Existing projects using this product have limited design support from TI. If available, you will find relevant collateral, tools and software on this page. Existing designs using this product have limited design support from TI. Request limited design support in the TI E2E™ support forums.

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Technical documentation

Design & development

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Package Pins CAD symbols, footprints & 3D models
CDIP (J) 16 Ultra Librarian
CFP (HKT) 16 Ultra Librarian

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