CD4098B

ACTIVO

Multivibrador monoestable CMOS Dual

Detalles del producto

Number of channels 2 Supply voltage (min) (V) 3 Supply voltage (max) (V) 18 Technology family CD4000 Input type Standard CMOS Output type Push-Pull Supply current (µA) 600 IOL (max) (mA) 4 IOH (max) (mA) -4 Features Balanced outputs, Positive input clamp diode, Retriggerable, Standard speed (tpd > 50ns) Operating temperature range (°C) -55 to 125 Rating Catalog
Number of channels 2 Supply voltage (min) (V) 3 Supply voltage (max) (V) 18 Technology family CD4000 Input type Standard CMOS Output type Push-Pull Supply current (µA) 600 IOL (max) (mA) 4 IOH (max) (mA) -4 Features Balanced outputs, Positive input clamp diode, Retriggerable, Standard speed (tpd > 50ns) Operating temperature range (°C) -55 to 125 Rating Catalog
PDIP (N) 16 181.42 mm² 19.3 x 9.4 SOIC (D) 16 59.4 mm² 9.9 x 6 TSSOP (PW) 16 32 mm² 5 x 6.4
  • Retriggerable/resettable capability
  • Trigger and reset propagation delays independent of RX, CX
  • Triggering from leading or trailing edge
  • Q and Q\ buffered outputs available
  • Separate resets
  • Wide range of output-pulse widths
  • 100% tested for maximum quiescent current at 20 V
  • Maximum input current of 1 uA at 18 V over full package-temperature range; 100 nA at 18 V and 25°C
  • Noise margin (full package-temperature range):
    • 1 V at VDD = 5 V
    • 2 V at VDD = 10 V
    • 2.5 V at VDD = 15 V
  • 5-V, 10-V, and 15-V parametric ratings
  • Standardized, symmetrical output characteristics
  • Meets all requirements of JEDEC Tentative Standard No. 13B, "Standard Specifications for Description of 'B' Series CMOS Devices."
  • Applications:
    • Pulse delay and timing
    • Pulse shaping
    • Astable multivibrator

  • Retriggerable/resettable capability
  • Trigger and reset propagation delays independent of RX, CX
  • Triggering from leading or trailing edge
  • Q and Q\ buffered outputs available
  • Separate resets
  • Wide range of output-pulse widths
  • 100% tested for maximum quiescent current at 20 V
  • Maximum input current of 1 uA at 18 V over full package-temperature range; 100 nA at 18 V and 25°C
  • Noise margin (full package-temperature range):
    • 1 V at VDD = 5 V
    • 2 V at VDD = 10 V
    • 2.5 V at VDD = 15 V
  • 5-V, 10-V, and 15-V parametric ratings
  • Standardized, symmetrical output characteristics
  • Meets all requirements of JEDEC Tentative Standard No. 13B, "Standard Specifications for Description of 'B' Series CMOS Devices."
  • Applications:
    • Pulse delay and timing
    • Pulse shaping
    • Astable multivibrator

CD4098B dual monostable multivibrator provides stable retriggerable/resettable one-shot operation for any fixed-voltage timing application.

An external resistor (RX) and an external capacitor (CX) control the timing for the circuit. Adjustment of RX and CX provides a wide range of output pulse widths from the Q and Q\ terminals. The time delay from trigger input to output transition (trigger progagation delay) and the time delay from set input to output transition (reset progagation delay) are independent of RX and CX.

Leading-edge-triggering (+TR) and trailing-edge-triggering (-TR) input are provided for triggering from either edge of an input pulse. An unused +TR input should be tied to VSS. An unused (-TR) input should be tied to VDD. A RESET (on low level) is provided for immediate termination of the output pulse or to prevent output pulses when power is turned on. An unused RESET input should be tied to VDD. However, if an entire section of the CD4098B is not used, its RESET should be tied to VSS. See Table 1.

In normal operation the circuit triggers (extends the output pulse one period) on the application of each new trigger pulse. For operation in the non-retriggerable mode, Q\ is connected to -TR when leading-edge triggering (+TR) is used or Q is connected to +TR when trailing-edge triggering (-TR) is used.

The time period (T) for this multivibrator can be approximated by: TX= ½ RXCX for CX 0.01 uF. Time periods as a function of RX for values of CX and VDD are given in Fig. 8. Values of T vary from unit to unit and as a function of voltage, temperature, and RXCX.

The minimum value of external resistance, RX, is 5 k. The maximum value of external capacitance, CX, is 100uF. Fig.9 shows time periods as a function of CX for values of RX and VDD.

The output pulse width has variations of ±2.5% typically, over the temperature range of -55°C to 125°C for CX= 1000 pF and RX= 100 k.

For power supply variations of ±5%, the output pulse width has variations of ±0.5% typically, for VDD= 10 V and 15 V and ±1% typically, for VDD= 5 V at CX= 1000 pF and RX= 5 k.

These types are supplied in 16-lead hermetic dual-in-line ceramic packages (F3A suffix), 16-lead dual-in-line plastic package (E suffix), 16-lead small-outline packages (M, M96, and MT suffixes), and 16-lead thin shrink small-outline packages (PW and PWR suffixes).

The CD4098B is similar to type MC14528.

CD4098B dual monostable multivibrator provides stable retriggerable/resettable one-shot operation for any fixed-voltage timing application.

An external resistor (RX) and an external capacitor (CX) control the timing for the circuit. Adjustment of RX and CX provides a wide range of output pulse widths from the Q and Q\ terminals. The time delay from trigger input to output transition (trigger progagation delay) and the time delay from set input to output transition (reset progagation delay) are independent of RX and CX.

Leading-edge-triggering (+TR) and trailing-edge-triggering (-TR) input are provided for triggering from either edge of an input pulse. An unused +TR input should be tied to VSS. An unused (-TR) input should be tied to VDD. A RESET (on low level) is provided for immediate termination of the output pulse or to prevent output pulses when power is turned on. An unused RESET input should be tied to VDD. However, if an entire section of the CD4098B is not used, its RESET should be tied to VSS. See Table 1.

In normal operation the circuit triggers (extends the output pulse one period) on the application of each new trigger pulse. For operation in the non-retriggerable mode, Q\ is connected to -TR when leading-edge triggering (+TR) is used or Q is connected to +TR when trailing-edge triggering (-TR) is used.

The time period (T) for this multivibrator can be approximated by: TX= ½ RXCX for CX 0.01 uF. Time periods as a function of RX for values of CX and VDD are given in Fig. 8. Values of T vary from unit to unit and as a function of voltage, temperature, and RXCX.

The minimum value of external resistance, RX, is 5 k. The maximum value of external capacitance, CX, is 100uF. Fig.9 shows time periods as a function of CX for values of RX and VDD.

The output pulse width has variations of ±2.5% typically, over the temperature range of -55°C to 125°C for CX= 1000 pF and RX= 100 k.

For power supply variations of ±5%, the output pulse width has variations of ±0.5% typically, for VDD= 10 V and 15 V and ±1% typically, for VDD= 5 V at CX= 1000 pF and RX= 5 k.

These types are supplied in 16-lead hermetic dual-in-line ceramic packages (F3A suffix), 16-lead dual-in-line plastic package (E suffix), 16-lead small-outline packages (M, M96, and MT suffixes), and 16-lead thin shrink small-outline packages (PW and PWR suffixes).

The CD4098B is similar to type MC14528.

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Documentación técnica

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Ver todo 8
Tipo Título Fecha
* Data sheet CD4098B Types datasheet (Rev. C) 29 oct 2004
Application note Designing With the SN74LVC1G123 Monostable Multivibrator (Rev. A) PDF | HTML 13 mar 2020
Selection guide Logic Guide (Rev. AB) 12 jun 2017
Application note Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) 02 dic 2015
User guide LOGIC Pocket Data Book (Rev. B) 16 ene 2007
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 08 jul 2004
User guide Signal Switch Data Book (Rev. A) 14 nov 2003
Application note Understanding Buffered and Unbuffered CD4xxxB Series Device Characteristics 03 dic 2001

Diseño y desarrollo

Para conocer los términos adicionales o los recursos necesarios, haga clic en cualquier título de abajo para ver la página de detalles cuando esté disponible.

Placa de evaluación

14-24-LOGIC-EVM — Módulo de evaluación genérico de productos lógicos para encapsulados D, DB, DGV, DW, DYY, NS y PW de

El módulo de evaluación (EVM) 14-24-LOGIC-EVM está diseñado para admitir cualquier dispositivo lógico que esté en un empaquetado D, DW, DB, NS, PW, DYY o DGV de 14 a 24 pines.

Guía del usuario: PDF | HTML
Encapsulado Pines Símbolos CAD, huellas y modelos 3D
PDIP (N) 16 Ultra Librarian
SOIC (D) 16 Ultra Librarian
TSSOP (PW) 16 Ultra Librarian

Pedidos y calidad

Información incluida:
  • RoHS
  • REACH
  • Marcado del dispositivo
  • Acabado de plomo/material de la bola
  • Clasificación de nivel de sensibilidad a la humedad (MSL) / reflujo máximo
  • Estimaciones de tiempo medio entre fallas (MTBF)/fallas en el tiempo (FIT)
  • Contenido del material
  • Resumen de calificaciones
  • Monitoreo continuo de confiabilidad
Información incluida:
  • Lugar de fabricación
  • Lugar de ensamblaje

Soporte y capacitación

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