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CD4521B

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Divisor de frecuencia de 24 etapas CMOS

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CD4521B

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Detalles del producto

Function Frequency divider Bits (#) 4 Technology family CD4000 Input type Standard CMOS Output type Push-Pull Features Partial power down (Ioff), Standard speed (tpd > 50ns) Operating temperature range (°C) -55 to 125 Rating Catalog
Function Frequency divider Bits (#) 4 Technology family CD4000 Input type Standard CMOS Output type Push-Pull Features Partial power down (Ioff), Standard speed (tpd > 50ns) Operating temperature range (°C) -55 to 125 Rating Catalog
PDIP (N) 16 181.42 mm² (19.3 mm × 9.4 mm) SOIC (D) 16 59.4 mm² (9.9 mm × 6 mm) SOP (NS) 16 79.56 mm² (10.2 mm × 7.8 mm) TSSOP (PW) 16 32 mm² (5 mm × 6.4 mm)
  • Reset disables the RC oscillator for low-power standby condition
  • VDD’ and VSS’ pins are brought out from the crystal oscillator to allow use of external resistors for low-power operation
  • Maximum input current of 1 µA at 18 V over full package-temperature range:
    100 nA at 18 V and 25°C
  • Common reset
  • 100% tested for 20-V quiescent current
  • 5, 10 and 15 V parametric ratings
  • Standardized symmetrical output characteristics
  • Meets all requirements of JEDEC Tentative Standard No. 13B, "Standard Specifications for Description of ’B’ Series CMOS Devices"

Data sheet acquired from Harris Semiconductor
  • Reset disables the RC oscillator for low-power standby condition
  • VDD’ and VSS’ pins are brought out from the crystal oscillator to allow use of external resistors for low-power operation
  • Maximum input current of 1 µA at 18 V over full package-temperature range:
    100 nA at 18 V and 25°C
  • Common reset
  • 100% tested for 20-V quiescent current
  • 5, 10 and 15 V parametric ratings
  • Standardized symmetrical output characteristics
  • Meets all requirements of JEDEC Tentative Standard No. 13B, "Standard Specifications for Description of ’B’ Series CMOS Devices"

Data sheet acquired from Harris Semiconductor

CD4521B consists of an oscillator section and 24 ripple-carry binary counter stages. The oscillator configuration (using IN1) allows design of either RC or crystal oscillator circuits. IN1 should be tied either HIGH or LOW when not in use. A HIGH on the RESET causes the counter to go to the all-0’s state and disables the oscillator. The count is advanced on the negative transition of IN1 (and IN2). A time-saving test mode is described in the Functional Test Sequence Table and in Fig. 6.

The CD4521B types are supplied in 16-lead dual-in-line plastic packages (E suffix), 16-lead small-outline packages (M, M96, MT, and NSR suffixes), and 16-lead thin shrink small-outline packages (PW and PWR suffixes).

CD4521B consists of an oscillator section and 24 ripple-carry binary counter stages. The oscillator configuration (using IN1) allows design of either RC or crystal oscillator circuits. IN1 should be tied either HIGH or LOW when not in use. A HIGH on the RESET causes the counter to go to the all-0’s state and disables the oscillator. The count is advanced on the negative transition of IN1 (and IN2). A time-saving test mode is described in the Functional Test Sequence Table and in Fig. 6.

The CD4521B types are supplied in 16-lead dual-in-line plastic packages (E suffix), 16-lead small-outline packages (M, M96, MT, and NSR suffixes), and 16-lead thin shrink small-outline packages (PW and PWR suffixes).
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* Hoja de datos CD4521B TYPES datasheet (Rev. C) 15/10/2003

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