CY74FCT543T

ACTIVO

Transceptores octal registrados con salidas de 3 estados

Detalles del producto

Number of channels 8 IOL (max) (mA) 64 IOH (max) (mA) -32 Input type TTL Output type TTL Features Partial power down (Ioff), Very high speed (tpd 5-10ns) Technology family FCT Rating Catalog Operating temperature range (°C) -40 to 85
Number of channels 8 IOL (max) (mA) 64 IOH (max) (mA) -32 Input type TTL Output type TTL Features Partial power down (Ioff), Very high speed (tpd 5-10ns) Technology family FCT Rating Catalog Operating temperature range (°C) -40 to 85
SSOP (DBQ) 24 51.9 mm² (8.65 mm × 6 mm) SOIC (DW) 24 159.65 mm² (15.5 mm × 10.3 mm)
  • Function, Pinout, and Drive Compatible With FCT and F Logic
  • Reduced VOH (Typically = 3.3 V) Versions of Equivalent FCT Functions
  • Edge-Rate Control Circuitry for Significantly Improved Noise Characteristics
  • Ioff Supports Partial-Power-Down Mode Operation
  • Matched Rise and Fall Times
  • Fully Compatible With TTL Input and Output Logic Levels
  • 3-State Outputs
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model (A114-A)
    • 200-V Machine Model (A115-A)
    • 1000-V Charged-Device Model (C101)
  • Separation Controls for Data Flow in Each Direction
  • Back-to-Back Latches for Storage
  • CY54FCT543T
    • 48-mA Output Sink Current
    • 12-mA Output Source Current
  • CY74FCT543T
    • 64-mA Output Sink Current
    • 32-mA Output Source Current

  • Function, Pinout, and Drive Compatible With FCT and F Logic
  • Reduced VOH (Typically = 3.3 V) Versions of Equivalent FCT Functions
  • Edge-Rate Control Circuitry for Significantly Improved Noise Characteristics
  • Ioff Supports Partial-Power-Down Mode Operation
  • Matched Rise and Fall Times
  • Fully Compatible With TTL Input and Output Logic Levels
  • 3-State Outputs
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model (A114-A)
    • 200-V Machine Model (A115-A)
    • 1000-V Charged-Device Model (C101)
  • Separation Controls for Data Flow in Each Direction
  • Back-to-Back Latches for Storage
  • CY54FCT543T
    • 48-mA Output Sink Current
    • 12-mA Output Source Current
  • CY74FCT543T
    • 64-mA Output Sink Current
    • 32-mA Output Source Current

The \x92FCT543T octal latched transceivers contain two sets of eight D-type latches with separate latch-enable (LEAB\, LEBA\) and output-enable (OEAB\, OEBA\) inputs for each set to permit independent control of input and output in either direction of data flow. For data flow from A to B, for example, the A-to-B enable (CEAB\) input must be low in order to enter data from A or to take data from B, as indicated in the function table. With CEAB\ low, a low signal on the A-to-B latch-enable (LEAB\) input makes the A-to-B latches transparent; a subsequent low-to-high transition of the LEAB\ signal puts the A latches in the storage mode and their outputs no longer change with the A inputs. With CEAB\ and OEAB\ low, the 3-state B-output buffers are active and reflect the data present at the output of the A latches. Control of data from B to A is similar, but uses CEBA\, LEBA\, and OEBA\ inputs.

These devices are fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

The \x92FCT543T octal latched transceivers contain two sets of eight D-type latches with separate latch-enable (LEAB\, LEBA\) and output-enable (OEAB\, OEBA\) inputs for each set to permit independent control of input and output in either direction of data flow. For data flow from A to B, for example, the A-to-B enable (CEAB\) input must be low in order to enter data from A or to take data from B, as indicated in the function table. With CEAB\ low, a low signal on the A-to-B latch-enable (LEAB\) input makes the A-to-B latches transparent; a subsequent low-to-high transition of the LEAB\ signal puts the A latches in the storage mode and their outputs no longer change with the A inputs. With CEAB\ and OEAB\ low, the 3-state B-output buffers are active and reflect the data present at the output of the A latches. Control of data from B to A is similar, but uses CEBA\, LEBA\, and OEBA\ inputs.

These devices are fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

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Documentación técnica

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Documentación principal Tipo Título Opciones de formato Descargar la versión más reciente en inglés Fecha
* Hoja de datos 8-Bit Latched Registered Transceivers With 3-State Outputs datasheet (Rev. A) 1/10/2001
* Guía del usuario CYFCT Parameter Measurement Information 2/04/2001

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14-24-LOGIC-EVM — Módulo de evaluación genérico de productos lógicos para encapsulados D, DB, DGV, DW, DYY, NS y PW de

El módulo de evaluación (EVM) 14-24-LOGIC-EVM está diseñado para admitir cualquier dispositivo lógico que se encuentre en un encapsulado D, DW, DB, NS, PW, DYY o DGV de 14 a 24 pines.

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Encapsulado Pines Símbolos CAD, huellas y modelos 3D
SSOP (DBQ) 24 Ultra Librarian
SOIC (DW) 24 Ultra Librarian

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