Inicio Microcontroladores (MCU) y procesadores Microprocesadores y DSP SoC del procesador de señal digital (DSP) de radar y audio
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Microcontroladores (MCU) y procesadores
Microprocesadores y DSP
SoC del procesador de señal digital (DSP) de radar y audio

DRA725

ACTIVO

Procesador SoC Arm Cortex-A15 de 1.2 GHz con gráficos y DSP para entretenimiento y clúster automotri

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DRA725

ACTIVO
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Detalles del producto

CPU 1 Arm Cortex-A15 Frequency (MHz) 1176 Coprocessors 4 Arm Cortex-M4 Graphics acceleration 1 2D, 1 3D Display type 1 HDMI, 3 LCD Protocols Ethernet PCIe 2 PCIe Gen 2 Hardware accelerators Audio tracking logic, Image video accelerator, Viterbi decoder Features Multimedia Operating system Android, Linux, RTOS Security Cryptographic acceleration, Device attestation & anti-counterfeit, Hardware-enforced isolation, Secure boot, Secure debug, Secure storage, Software IP protection Rating Automotive Operating temperature range (°C) -40 to 125 Edge AI enabled No
CPU 1 Arm Cortex-A15 Frequency (MHz) 1176 Coprocessors 4 Arm Cortex-M4 Graphics acceleration 1 2D, 1 3D Display type 1 HDMI, 3 LCD Protocols Ethernet PCIe 2 PCIe Gen 2 Hardware accelerators Audio tracking logic, Image video accelerator, Viterbi decoder Features Multimedia Operating system Android, Linux, RTOS Security Cryptographic acceleration, Device attestation & anti-counterfeit, Hardware-enforced isolation, Secure boot, Secure debug, Secure storage, Software IP protection Rating Automotive Operating temperature range (°C) -40 to 125 Edge AI enabled No
FCBGA (ABC) 760 529 mm² (23 mm × 23 mm)
  • Architecture designed for infotainment applications
  • Video, image, and graphics processing support
    • Full-HD video (1920 × 1080p, 60 fps)
    • Multiple video inputs and video outputs
    • 2D and 3D graphics
  • Arm® Cortex®-A15 microprocessor subsystem
  • C66x floating-point VLIW DSP cores
    • Fully object-code compatible with C67x and C64x+
    • Up to thirty-two 16 × 16-bit fixed-point multiplies per cycle
  • Up to 512KB of on-chip L3 RAM
  • Level 3 (L3) and level 4 (L4) interconnects
  • DDR3/DDR3L External Memory Interface (EMIF) module
    • Supports up to DDR3-1333 (667 MHz)
    • Up to 2GB across single chip select
  • Dual Arm® Cortex®-M4 Image Processing Units (IPU)
  • IVA-HD subsystem
  • Display subsystem
    • Display controller with DMA engine and up to three pipelines
    • HDMI™ encoder: HDMI 1.4a and DVI 1.0 compliant
  • 2D-graphics accelerator (BB2D) subsystem
    • Vivante® GC320 core
  • Video Processing Engine (VPE)
  • Single-core PowerVR™ SGX544 3D GPU
  • One Video Input Port (VIP) module
    • Support for up to four multiplexed input ports
  • General-Purpose Memory Controller (GPMC)
  • Enhanced Direct Memory Access (EDMA) controller
  • 2-Port Gigabit Ethernet switch
    • Up to two external ports
  • Sixteen 32-bit general-purpose timers
  • 32-bit MPU watchdog timer
  • Six high speed Inter-Integrated Circuit (I2C™) ports
  • HDQ/1-Wire® interface
  • Ten configurable UART/IrDA/CIR modules
  • Four Multichannel Serial Peripheral Interfaces (McSPI)
  • Quad Serial Peripheral Interface (QSPI)
  • Media Local Bus subsystem (MLBSS)
  • Real-Time Clock subsystem (RTCSS)
  • SATA interface
  • Eight Multichannel Audio Serial Port (McASP) modules
  • SuperSpeed USB 3.0 dual-role device
  • High Speed USB 2.0 dual-role device
  • High Speed USB 2.0 on-the-go
  • Four MultiMedia Card/Secure Digital®/Secure Digital Input Output interfaces (MMC™/SD®/SDIO)
  • PCI-Express® (PCIe®) revision 3.0 subsystems with two 5-Gbps lanes
    • One 2-lane Gen2-compliant port
    • or two 1-lane Gen2-compliant ports
  • Dual Controller Area Network (DCAN) modules
    • CAN 2.0B Protocol
  • MIPI® Camera Serial Interface 2 (CSI-2)
  • Up to 215 General-Purpose I/O (GPIO) pins
  • Device security features
    • Hardware crypto accelerators and DMA
    • Firewalls
    • JTAG lock
    • Secure keys
    • Secure ROM and Boot
    • Customer programmable keys (Silicon Revision 2.1)
  • Power, reset, and clock management
  • On-chip debug with CTools technology
  • 28-nm CMOS technology
  • 23 mm × 23 mm, 0.8-mm Pitch, 760-Pin BGA (ABC)
  • Architecture designed for infotainment applications
  • Video, image, and graphics processing support
    • Full-HD video (1920 × 1080p, 60 fps)
    • Multiple video inputs and video outputs
    • 2D and 3D graphics
  • Arm® Cortex®-A15 microprocessor subsystem
  • C66x floating-point VLIW DSP cores
    • Fully object-code compatible with C67x and C64x+
    • Up to thirty-two 16 × 16-bit fixed-point multiplies per cycle
  • Up to 512KB of on-chip L3 RAM
  • Level 3 (L3) and level 4 (L4) interconnects
  • DDR3/DDR3L External Memory Interface (EMIF) module
    • Supports up to DDR3-1333 (667 MHz)
    • Up to 2GB across single chip select
  • Dual Arm® Cortex®-M4 Image Processing Units (IPU)
  • IVA-HD subsystem
  • Display subsystem
    • Display controller with DMA engine and up to three pipelines
    • HDMI™ encoder: HDMI 1.4a and DVI 1.0 compliant
  • 2D-graphics accelerator (BB2D) subsystem
    • Vivante® GC320 core
  • Video Processing Engine (VPE)
  • Single-core PowerVR™ SGX544 3D GPU
  • One Video Input Port (VIP) module
    • Support for up to four multiplexed input ports
  • General-Purpose Memory Controller (GPMC)
  • Enhanced Direct Memory Access (EDMA) controller
  • 2-Port Gigabit Ethernet switch
    • Up to two external ports
  • Sixteen 32-bit general-purpose timers
  • 32-bit MPU watchdog timer
  • Six high speed Inter-Integrated Circuit (I2C™) ports
  • HDQ/1-Wire® interface
  • Ten configurable UART/IrDA/CIR modules
  • Four Multichannel Serial Peripheral Interfaces (McSPI)
  • Quad Serial Peripheral Interface (QSPI)
  • Media Local Bus subsystem (MLBSS)
  • Real-Time Clock subsystem (RTCSS)
  • SATA interface
  • Eight Multichannel Audio Serial Port (McASP) modules
  • SuperSpeed USB 3.0 dual-role device
  • High Speed USB 2.0 dual-role device
  • High Speed USB 2.0 on-the-go
  • Four MultiMedia Card/Secure Digital®/Secure Digital Input Output interfaces (MMC™/SD®/SDIO)
  • PCI-Express® (PCIe®) revision 3.0 subsystems with two 5-Gbps lanes
    • One 2-lane Gen2-compliant port
    • or two 1-lane Gen2-compliant ports
  • Dual Controller Area Network (DCAN) modules
    • CAN 2.0B Protocol
  • MIPI® Camera Serial Interface 2 (CSI-2)
  • Up to 215 General-Purpose I/O (GPIO) pins
  • Device security features
    • Hardware crypto accelerators and DMA
    • Firewalls
    • JTAG lock
    • Secure keys
    • Secure ROM and Boot
    • Customer programmable keys (Silicon Revision 2.1)
  • Power, reset, and clock management
  • On-chip debug with CTools technology
  • 28-nm CMOS technology
  • 23 mm × 23 mm, 0.8-mm Pitch, 760-Pin BGA (ABC)

DRA72x ("Jacinto™ 6 Eco") infotainment applications processors are developed on the same architecture as Jacinto 6 devices to meet the intense processing needs of the modern infotainment-enabled automobile experiences.

DRA72x devices offer upward scalability to DRA74x devices, while being pin-compatible across the family, allowing Original-Equipment Manufacturers (OEMs) and Original-Design Manufacturers (ODMs) to quickly implement innovative connectivity technologies, speech recognition, audio streaming, and more. Jacinto 6 and Jacinto 6 Eco devices bring high processing performance through the maximum flexibility of a fully integrated mixed processor solution.

Programmability is provided by a single-core Arm® Cortex®-A15 RISC CPU with Neon™ extensions and a TI C66x VLIW floating-point DSP core. The Arm® processor lets developers keep control functions separate from other algorithms programmed on the DSP and coprocessors, thus reducing the complexity of the system software.

Additionally, TI provides a complete set of development tools for the Arm®, and DSP, including C compilers and a debugging interface for visibility into source code execution.

Cryptographic acceleration is available in all devices. All other supported security features, including support for secure boot, debug security and support for trusted execution environment is available on High-Security (HS) devices. For more information about HS devices, contact your TI representative.

The DRA72x Jacinto 6 Eco processor family is qualified according to the AEC-Q100 standard.

DRA72x ("Jacinto™ 6 Eco") infotainment applications processors are developed on the same architecture as Jacinto 6 devices to meet the intense processing needs of the modern infotainment-enabled automobile experiences.

DRA72x devices offer upward scalability to DRA74x devices, while being pin-compatible across the family, allowing Original-Equipment Manufacturers (OEMs) and Original-Design Manufacturers (ODMs) to quickly implement innovative connectivity technologies, speech recognition, audio streaming, and more. Jacinto 6 and Jacinto 6 Eco devices bring high processing performance through the maximum flexibility of a fully integrated mixed processor solution.

Programmability is provided by a single-core Arm® Cortex®-A15 RISC CPU with Neon™ extensions and a TI C66x VLIW floating-point DSP core. The Arm® processor lets developers keep control functions separate from other algorithms programmed on the DSP and coprocessors, thus reducing the complexity of the system software.

Additionally, TI provides a complete set of development tools for the Arm®, and DSP, including C compilers and a debugging interface for visibility into source code execution.

Cryptographic acceleration is available in all devices. All other supported security features, including support for secure boot, debug security and support for trusted execution environment is available on High-Security (HS) devices. For more information about HS devices, contact your TI representative.

The DRA72x Jacinto 6 Eco processor family is qualified according to the AEC-Q100 standard.
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Documentación técnica

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Documentación principal Tipo Título Opciones de formato Descargar la versión más reciente en inglés Fecha
* Hoja de datos DRA72x Infotainment Applications Processor Silicon Revision 2.0 and 2.1 datasheet (Rev. H) PDF | HTML 24/07/2019
* Guía del usuario DRA71x and DRA72x Technical Reference Manual (Rev. D) 21/05/2019
* Errata DRA72x and DRA71x SoC for Automotive Infortainment Silicon Errata (Rev. F) PDF | HTML 8/09/2024
Nota sobre la aplicación Integrating virtual DRM between VISION SDK and PSDK on Jacinto6 SOC PDF | HTML 5/05/2021
Nota sobre la aplicación IVA-HD Sharing Between VISION-SDK and PSDKLA on Jacinto6 SoC PDF | HTML 24/08/2020
Informe Jump Start Upgrading Your Digital Cluster Design with Jacinto 6 Platform (Rev. A) 17/08/2020
Nota sobre la aplicación AM57x, DRA7x, and TDA2x EMIF Tools (Rev. E) 6/01/2020
Nota sobre la aplicación Integrating New Cameras With Video Input Port on DRA7xx SoCs PDF | HTML 11/06/2019
Nota sobre la aplicación Achieving Early CAN Response on DRA7xx Devices 28/11/2018
Nota sobre la aplicación DRA74x_75x/DRA72x Performance (Rev. A) 31/10/2018
Nota sobre la aplicación Audio Post Processing Engine on Jacinto™ DRA7x Family of Devices 14/09/2018
Nota sobre la aplicación The Implementation of YUV422 Output for SRV 2/08/2018
Nota sobre la aplicación MMC DLL Tuning (Rev. B) 31/07/2018
Nota sobre la aplicación Integrating AUTOSAR on TI SoC: Fundamentals 18/06/2018
Nota sobre la aplicación ECC/EDC on TDAxx (Rev. B) 13/06/2018
Nota sobre la aplicación Tools and Techniques to Root Case Failures in Video Capture Subsystem 12/06/2018
Nota sobre la aplicación Sharing VPE Between VISIONSDK and PSDKLA 4/05/2018
Nota sobre la aplicación Android Boot Optimization on DRA7xx Devices (Rev. A) 13/02/2018
Nota sobre la aplicación Flashing Utility - mflash 9/01/2018
Nota sobre la aplicación Using Peripheral Boot and DFU for Rapid Development on Jacinto 6 Devices (Rev. A) 30/11/2017
Nota sobre la aplicación Jacinto6 Spread Spectrum Clocking Configuration (Rev. A) 27/11/2017
Nota sobre la aplicación Optimizing DRA7xx and TDA2xx Processors for use with Video Display SERDES (Rev. B) 7/11/2017
Nota sobre la aplicación A Guide to Debugging With CCS on the DRA75x, DRA74x, TDA2x and TDA3x Family of D (Rev. B) 3/11/2017
Nota sobre la aplicación Robust Rear-View Camera (RVC) App Report 13/09/2017
Nota sobre la aplicación Using DSS Write-Back Pipeline for RGB-to-YUV Conversion on DRA7xx Devices 14/08/2017
Nota sobre la aplicación Software Guidelines to EMIF/DDR3 Configuration on DRA7xx Devices 12/07/2017
Informe Revolutionize the automotive cockpit 2/06/2017
Nota sobre la aplicación Linux Boot Time Optimizations on DRA7xx Devices 31/03/2017
Nota sobre la aplicación Interfacing DRA75x and DRA74x Audio to Analog Codecs (Rev. A) 17/02/2017
Nota sobre la aplicación Early Splash Screen on DRA7x Devices 31/01/2017
Nota sobre la aplicación Quality of Service (QoS) Knobs for DRA74x, DRA75x & TDA2x Family of Devices (Rev. A) 15/12/2016
Guía del usuario DM369 Camera Starter Kit (CSK) User's Guide 15/12/2016
EVM User's guide DRA72x EVM CPU Board User's Guide 7/12/2016
Nota sobre la aplicación Gstreamer Migration Guidelines 26/04/2016
Guía del usuario Jacinto6 Android Video Decoder Software Design Specification User's Guide 21/04/2016
Nota sobre la aplicación Flashing Binaries to DRA7xx Factory Boards Using DFU 14/04/2016
Nota sobre la aplicación Tools and Techniques for Audio Debugging 13/04/2016
Nota sobre la aplicación Debugging Tools and Techniques With IPC3.x 30/03/2016
Nota sobre la aplicación Modifying Memory Usage for IPUMM Applications Loaded IPC 3.x for DRA75x, DRA74x (Rev. A) 15/01/2016
Nota sobre la aplicación Guide to fix Perf Issues Using QoS Knobs for DRA74x, DRA75x, TDA2x & TD3x Device 13/08/2014
Informe Today’s high-end infotainment soon becoming mainstream 2/06/2014

Diseño y desarrollo

Para conocer los términos adicionales o los recursos necesarios, haga clic en cualquier título de abajo para ver la página de detalles cuando esté disponible.

Kit de desarrollo de software (SDK)

PROCESSOR-SDK-ANDROID-AUTOMOTIVE-DRA7X

Procesador de kit de desarrollo de software Linux para uso automotriz

El procesador de kit de desarrollo de software de Linux para uso automotriz es la plataforma de desarrollo de software fundamental para la familia Jacinto™ DRAx de TI de sistemas en chip de infoentretenimiento. El marco de (...)

Productos y hardware compatibles
Kit de desarrollo de software (SDK)

PROCESSOR-SDK-LINUX-AUTOMOTIVE-DRA7X — PROCESSOR-SDK-LINUX-AUTOMOTIVE-DRA7X

Procesador de kit de desarrollo de software Linux para uso automotriz

El procesador de kit de desarrollo de software de Linux para uso automotriz es la plataforma de desarrollo de software fundamental para la familia Jacinto™ DRAx de TI de sistemas en chip de infoentretenimiento. El marco de (...)

Productos y hardware compatibles
Kit de desarrollo de software (SDK)

PROCESSOR-SDK-RTOS-AUTOMOTIVE-DRA7X

Procesador de kit de desarrollo de software Linux para uso automotriz

El procesador de kit de desarrollo de software de Linux para uso automotriz es la plataforma de desarrollo de software fundamental para la familia Jacinto™ DRAx de TI de sistemas en chip de infoentretenimiento. El marco de (...)

Productos y hardware compatibles
IDE, configuración, compilador o depurador

SYSCONFIG — Standalone desktop version of SysConfig

CCStudio™ SysConfig is part of TI's extensive CCStudio™ development ecosystem and is a configuration tool that simplifies hardware and software configuration challenges to accelerate software development.

SysConfig provides an intuitive graphical user interface for configuring pins, peripherals, (...)

Productos y hardware compatibles
Sistema operativo (SO)

GHS-INTEGRITY-RTOS — Green Hills INTEGRITY RTOS

The flagship of Green Hills Software operating systems—the INTEGRITY RTOS—is built around a partitioning architecture to provide embedded systems with total reliability, absolute security, and maximum real-time performance. With its leadership pedigree underscored by certifications in a (...)
Productos y hardware compatibles
Soporte de software

VCTR-3P-MICROSAR — Software de vector MICROSAR AUTOSAR para microcontroladores y computadoras de alto rendimiento (H

Las familias de productos MICROSAR y DaVinci simplifican el desarrollo de unidades de control electrónico (ECU) con software sofisticados integrados y herramientas de desarrollo poderosas para microcontroladores y HPC. Con el software de infraestructura avanzado, puede crear una base óptima para (...)

Desde: Vector Informatik GmbH
Productos y hardware compatibles
Modelo de simulación

DRA72x BSDL

SPRM684.ZIP (13 KB) - Modelo BSDL
Productos y hardware compatibles
Modelo de simulación

DRA72x IBIS

SPRM683.ZIP (12619 KB) - Modelo IBIS
Productos y hardware compatibles
Modelo de simulación

DRA72x Thermal Model

SPRM681.ZIP (1 KB) - Modelo térmico
Productos y hardware compatibles
Herramienta de cálculo

CLOCKTREETOOL — Herramienta de árbol de reloj para Sitara, automoción, análisis de visión y procesadores de señal di

The Clock Tree Tool (CTT) for Sitara™ ARM®, Automotive, and Digital Signal Processors is an interactive clock tree configuration software that provides information about the clocks and modules in these TI devices. It allows the user to:

  • Visualize the device clock tree
  • Interact with clock tree (...)
Productos y hardware compatibles
Encapsulado Pines Símbolos CAD, huellas y modelos 3D
FCBGA (ABC) 760 Ultra Librarian
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