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SN5476

ACTIVO

Biestables de tipo J-K dobles con opciones de eliminación y preajuste

Detalles del producto

Number of channels 2 Technology family TTL Input type TTL IOL (max) (mA) -0.4 IOH (max) (mA) 16 Operating temperature range (°C) -55 to 125 Rating Military
Number of channels 2 Technology family TTL Input type TTL IOL (max) (mA) -0.4 IOH (max) (mA) 16 Operating temperature range (°C) -55 to 125 Rating Military
CDIP (J) 16 135.3552 mm² (— mm × — mm) CFP (W) 16 69.319 mm² (— mm × — mm)
  • Package Options Include Plastic and Ceramic DIPs and Ceramic Flat Packages
  • Dependable Texas Instruments Quality and Reliability

 

  • Package Options Include Plastic and Ceramic DIPs and Ceramic Flat Packages
  • Dependable Texas Instruments Quality and Reliability

 

The '76 contains two independent J-K flip-flops with individual J-K, clock, preset, and clear inputs. The '76 is a positive-edge-triggered flip-flop. J-K input is loaded into the master while the clock is high and transferred to the slave on the high-to-low transition. For these devices the J and K inputs must be stable while the clock is high.

The 'LS76A contain two independent negative-edge-triggered flip-flops. The J and K inputs must be stable one setup time prior to the high-to-low clock transition for predictable operation. The preset and clear are asynchronous active low inputs. When low they override the clock and data inputs forcing the outputs to the steady state levels as shown in the function table.

The SN5476 and the SN54LS76A are characterized for operation over the full military temperature range of -55°C to 125°C. The SN7476 and the SN74LS76A are characterized for operation from 0°C to 70°C.

 

The '76 contains two independent J-K flip-flops with individual J-K, clock, preset, and clear inputs. The '76 is a positive-edge-triggered flip-flop. J-K input is loaded into the master while the clock is high and transferred to the slave on the high-to-low transition. For these devices the J and K inputs must be stable while the clock is high.

The 'LS76A contain two independent negative-edge-triggered flip-flops. The J and K inputs must be stable one setup time prior to the high-to-low clock transition for predictable operation. The preset and clear are asynchronous active low inputs. When low they override the clock and data inputs forcing the outputs to the steady state levels as shown in the function table.

The SN5476 and the SN54LS76A are characterized for operation over the full military temperature range of -55°C to 125°C. The SN7476 and the SN74LS76A are characterized for operation from 0°C to 70°C.

 

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Documentación técnica

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Documentación principal Tipo Título Opciones de formato Descargar la versión más reciente en inglés Fecha
* Hoja de datos Dual J-K Flip-Flops With Preset And Clear datasheet 1/03/1988
* SMD SN5476 SMD 5962-95575 21/06/2016

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