Inicio Lógica y traducción de voltaje Biestables, latches y registros Biestables tipo D

SN54BCT574

ACTIVO

Biestables de tipo D con activación de borde octal con salidas de 3 estados

Detalles del producto

Number of channels 8 Technology family BCT Input type TTL-Compatible CMOS Output type 3-State Clock frequency (max) (MHz) 77 IOL (max) (mA) 48 IOH (max) (mA) -12 Supply current (max) (µA) 62000 Features Very high speed (tpd 5-10ns) Operating temperature range (°C) -55 to 125 Rating Military
Number of channels 8 Technology family BCT Input type TTL-Compatible CMOS Output type 3-State Clock frequency (max) (MHz) 77 IOL (max) (mA) 48 IOH (max) (mA) -12 Supply current (max) (µA) 62000 Features Very high speed (tpd 5-10ns) Operating temperature range (°C) -55 to 125 Rating Military
CDIP (J) 20 167.464 mm² (— mm × — mm)
  • Operating Voltage Range of 4.5 V to 5.5 V
  • State-of-the-Art BiCMOS Design Significantly Reduces ICCZ
  • Full Parallel Access for Loading
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model (A114-A)
    • 200-V Machine Model (A115-A)
    • 1000-V Charged-Device Model (C101)

  • Operating Voltage Range of 4.5 V to 5.5 V
  • State-of-the-Art BiCMOS Design Significantly Reduces ICCZ
  • Full Parallel Access for Loading
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model (A114-A)
    • 200-V Machine Model (A115-A)
    • 1000-V Charged-Device Model (C101)

These 8-bit flip-flops feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.

The eight flip-flops of the ’BCT574 devices are edge-triggered D-type flip-flops. On the positive transition of the clock (CLK) input, the Q outputs are set to the logic levels that were set up at the data (D) inputs.

A buffered output-enable (OE)\ input can be used to place the eight outputs in either a normal logic state (high or low logic levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without interface or pullup components.

To ensure the high-impedance state during power up or power down, (OE)\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

(OE)\ does not affect internal operations of the flip-flops. Old data can be retained or new data can be entered while the outputs are in the high-impedance state.

These 8-bit flip-flops feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.

The eight flip-flops of the ’BCT574 devices are edge-triggered D-type flip-flops. On the positive transition of the clock (CLK) input, the Q outputs are set to the logic levels that were set up at the data (D) inputs.

A buffered output-enable (OE)\ input can be used to place the eight outputs in either a normal logic state (high or low logic levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without interface or pullup components.

To ensure the high-impedance state during power up or power down, (OE)\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

(OE)\ does not affect internal operations of the flip-flops. Old data can be retained or new data can be entered while the outputs are in the high-impedance state.

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CD74HCT574 ACTIVO Flip-Flops tipo D con activación de borde positivo octal y CMOS Logic de alta velocidad con salidas Voltage range 4.5V to 5.5V, average propagation delay 22ns, average drive strength 4mA

Documentación técnica

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Documentación principal Tipo Título Opciones de formato Descargar la versión más reciente en inglés Fecha
* Hoja de datos SN54BCT574, SN74BCT574 datasheet (Rev. C) 11/03/2003
* SMD SN54BCT574 SMD 5962-95836 21/06/2016

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