SN54HC245-SP

ACTIVO

QML-V, Octal Bus Transceivers With 3-State Outputs

Detalles del producto

Number of channels 8 IOL (max) (mA) 7.8 IOH (max) (mA) -7.8 Input type CMOS Output type CMOS Features Balanced outputs, High speed (tpd 10-50ns), Positive input clamp diode Technology family HC Rating Space Operating temperature range (°C) -55 to 125
Number of channels 8 IOL (max) (mA) 7.8 IOH (max) (mA) -7.8 Input type CMOS Output type CMOS Features Balanced outputs, High speed (tpd 10-50ns), Positive input clamp diode Technology family HC Rating Space Operating temperature range (°C) -55 to 125
CDIP (J) 20 167.464 mm² (— mm × — mm) CFP (W) 20 90.5828 mm² (— mm × — mm)
  • Wide Operating Voltage Range of 2 V to 6 V
  • High-Current 3-State Outputs Drive Bus Lines Directly or Up to 15 LSTTL Loads
  • Low Power Consumption, 80-µA Max ICC
  • Typical tpd = 12 ns
  • ±6-mA Output Drive at 5 V
  • Low Input Current of 1 µA Max
  • On Products Compliant to MIL-PRF-38535, All Parameters Are Tested Unless Otherwise Noted. On All Other Products, Production Processing Does Not Necessarily Include Testing of All Parameters.
  • Wide Operating Voltage Range of 2 V to 6 V
  • High-Current 3-State Outputs Drive Bus Lines Directly or Up to 15 LSTTL Loads
  • Low Power Consumption, 80-µA Max ICC
  • Typical tpd = 12 ns
  • ±6-mA Output Drive at 5 V
  • Low Input Current of 1 µA Max
  • On Products Compliant to MIL-PRF-38535, All Parameters Are Tested Unless Otherwise Noted. On All Other Products, Production Processing Does Not Necessarily Include Testing of All Parameters.

These octal bus transceivers are designed for asynchronous two-way communication between data buses. The control-function implementation minimizes external timing requirements.

The devices allow data transmission from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable ( OE) input can be used to disable the device so that the buses are effectively isolated.

These octal bus transceivers are designed for asynchronous two-way communication between data buses. The control-function implementation minimizes external timing requirements.

The devices allow data transmission from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable ( OE) input can be used to disable the device so that the buses are effectively isolated.

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Documentación principal Tipo Título Opciones de formato Descargar la versión más reciente en inglés Fecha
* Hoja de datos SNx4HC245 Octal Bus Transceivers With 3-State Outputs datasheet (Rev. F) PDF | HTML 31/08/2022
* SMD SN54HC245-SP SMD 5962-84085 8/07/2016

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