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Lógica y traducción de voltaje
Búferes, controladores y transceptores
Búferes y controladores no inversores

SN54LVTH244A

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Búferes de 8 canales, 2.7 V a 3.6 V con retención de bus, entradas CMOS compatibles con TTL y salida

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Hoja de datos

SN54LVTH244A

ACTIVO
Hoja de datos Haga su pedido ahora

Detalles del producto

Technology family LVT Number of channels 8 IOL (max) (mA) 48 Supply current (max) (µA) 5000 IOH (max) (mA) -24 Input type TTL-Compatible CMOS Output type 3-State Features Bus-hold, Over-voltage tolerant inputs, Partial power down (Ioff), Power up 3-state, Ultra high speed (tpd <5ns) Rating Military Operating temperature range (°C) -55 to 125
Technology family LVT Number of channels 8 IOL (max) (mA) 48 Supply current (max) (µA) 5000 IOH (max) (mA) -24 Input type TTL-Compatible CMOS Output type 3-State Features Bus-hold, Over-voltage tolerant inputs, Partial power down (Ioff), Power up 3-state, Ultra high speed (tpd <5ns) Rating Military Operating temperature range (°C) -55 to 125
CFP (W) 20 90.5828 mm² (— mm × — mm) CDIP (J) 20 167.464 mm² (— mm × — mm) LCCC (FK) 20 79.0321 mm² (— mm × — mm)
  • Support Mixed-Mode Signal Operation (5-V Input and Output Voltages With 3.3-V VCC)
  • Typical VOLP (Output Ground Bounce)
       <0.8 V at VCC = 3.3 V, TA = 25°C
  • Support Unregulated Battery Operation Down to 2.7 V
  • Ioff and Power-Up 3-State Support Hot Insertion
  • Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors
  • Latch-Up Performance Exceeds 500 mA Per JESD 17
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model (A114-A)
    • 200-V Machine Model (A115-A)
  • Support Mixed-Mode Signal Operation (5-V Input and Output Voltages With 3.3-V VCC)
  • Typical VOLP (Output Ground Bounce)
       <0.8 V at VCC = 3.3 V, TA = 25°C
  • Support Unregulated Battery Operation Down to 2.7 V
  • Ioff and Power-Up 3-State Support Hot Insertion
  • Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors
  • Latch-Up Performance Exceeds 500 mA Per JESD 17
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model (A114-A)
    • 200-V Machine Model (A115-A)

These octal buffers and line drivers are designed specifically for low-voltage (3.3-V) VCC operation, but with the capability to provide a TTL interface to a 5-V system environment.

The ’LVTH244A devices are organized as two 4-bit line drivers with separate output-enable (OE)\ inputs. When OE\ is low, the devices pass data from the A inputs to the Y outputs. When OE\ is high, the outputs are in the high-impedance state.

To ensure the high-impedance state during power up or power down, OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended.

These devices are fully specified for hot-insertion applications using Ioff and power-up 3-state. The Ioff circuitry disables the outputs, preventing damaging current backflow through the devices when they are powered down. The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down, which prevents driver conflict.

These octal buffers and line drivers are designed specifically for low-voltage (3.3-V) VCC operation, but with the capability to provide a TTL interface to a 5-V system environment.

The ’LVTH244A devices are organized as two 4-bit line drivers with separate output-enable (OE)\ inputs. When OE\ is low, the devices pass data from the A inputs to the Y outputs. When OE\ is high, the outputs are in the high-impedance state.

To ensure the high-impedance state during power up or power down, OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended.

These devices are fully specified for hot-insertion applications using Ioff and power-up 3-state. The Ioff circuitry disables the outputs, preventing damaging current backflow through the devices when they are powered down. The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down, which prevents driver conflict.
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Documentación técnica

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Documentación principal Tipo Título Opciones de formato Descargar la versión más reciente en inglés Fecha
* Hoja de datos SN54LVTH244A, SN74LVTH244A datasheet (Rev. J) 8/10/2003
* SMD SN54LVTH244A SMD 5962-95844 21/06/2016

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Encapsulado Pines Símbolos CAD, huellas y modelos 3D
CFP (W) 20 Ultra Librarian
CDIP (J) 20 Ultra Librarian
LCCC (FK) 20 Ultra Librarian
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