This octal buffer and line driver is designed specifically to
improve both the performance and density of 3-state memory address
drivers, clock drivers, and bus-oriented receivers and transmitters.
Taken together with the SN64BCT240 and SN64BCT241, these devices
provide the choice of selected combinations of inverting and
noninverting outputs, symmetrical active-low output-enable (
) inputs, and complementary OE and
inputs.
The SN64BCT244 is organized as two 4-bit buffers/line drivers with
separate output-enable ()
inputs. When is low, the
device passes data from the A inputs to the Y outputs. When is high, the outputs are in the
high-impedance state.
The outputs are in a high-impedance state during power up and power down while the supply voltage is less than approximately 3 V.
The SN64BCT244 is characterized for operation from -40°C to 85°C.
| Tipo | Título | Fecha | ||
|---|---|---|---|---|
| * | Data sheet | Octal Buffer/Driver With 3-State Outputs datasheet (Rev. A) | 01 ene 1994 | |
| Application note | Implications of Slow or Floating CMOS Inputs (Rev. E) | 26 jul 2021 | ||
| Selection guide | Logic Guide (Rev. AB) | 12 jun 2017 | ||
| Application note | Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) | 02 dic 2015 | ||
| User guide | LOGIC Pocket Data Book (Rev. B) | 16 ene 2007 | ||
| Application note | Semiconductor Packing Material Electrostatic Discharge (ESD) Protection | 08 jul 2004 | ||
| Application note | TI IBIS File Creation, Validation, and Distribution Processes | 29 ago 2002 | ||
| Application note | Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A) | 01 ago 1997 | ||
| Application note | Designing With Logic (Rev. C) | 01 jun 1997 | ||
| Application note | Input and Output Characteristics of Digital Integrated Circuits | 01 oct 1996 | ||
| Application note | Live Insertion | 01 oct 1996 |
Para conocer los términos adicionales o los recursos necesarios, haga clic en cualquier título de abajo para ver la página de detalles cuando esté disponible.
El módulo de evaluación 14-24-LOGIC-EVM (EVM) está diseñado para admitir cualquier dispositivo lógico que esté en un encapsulado D, DW, DB, NS, PW, DYY o DGV de 14 a 24 pines.
| Paquete | Pasadores | Descargar |
|---|---|---|
| SOIC (DW) | 20 | Ver opciones |
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