SN74ALVCH162244

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Búferes de 16 canales, 1.65 V a 3.6 V con retención de bus y salidas de 3 estados

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Hoja de datos

document-pdfAcrobat SN74ALVCH162244 datasheet (Rev. F) (Inglés)

SN74ALVCH162244

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Hoja de datos

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Detalles del producto

Technology family

ALVC

Number of channels

16

IOL (max) (mA)

12

Supply current (max) (µA)

40

IOH (max) (mA)

-12

Input type

Standard CMOS

Output type

3-State

Features

Balanced outputs, Bus-hold, Damping resistors, Over-voltage tolerant inputs, Very high speed (tpd 5-10ns)

Rating

Catalog

Operating temperature range (°C)

-40 to 85

Technology family

ALVC

Number of channels

16

IOL (max) (mA)

12

Supply current (max) (µA)

40

IOH (max) (mA)

-12

Input type

Standard CMOS

Output type

3-State

Features

Balanced outputs, Bus-hold, Damping resistors, Over-voltage tolerant inputs, Very high speed (tpd 5-10ns)

Rating

Catalog

Operating temperature range (°C)

-40 to 85

TSSOP (DGG)

48

101.25 mm² (12.5 mm × 8.1 mm)

SSOP (DL)

48

164.358 mm² (15.88 mm × 10.35 mm)

Member of the Texas Instruments Widebus™ Family
EPIC™ (Enhanced-Performance Implanted CMOS) Submicron Process
Output Ports Have Equivalent 26- Series Resistors, So No External Resistors Are Required
ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)
Latch-Up Performance Exceeds 250 mA Per JESD 17
Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors
Package Options Include Plastic 300-mil Shrink Small-Outline (DL) and Thin Shrink Small-Outline (DGG) Packages

NOTE: For tape-and-reel order entry, the DGGR package is abbreviated to GR.

Widebus, EPIC are trademarks of Texas Instruments.

Member of the Texas Instruments Widebus™ Family
EPIC™ (Enhanced-Performance Implanted CMOS) Submicron Process
Output Ports Have Equivalent 26- Series Resistors, So No External Resistors Are Required
ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)
Latch-Up Performance Exceeds 250 mA Per JESD 17
Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors
Package Options Include Plastic 300-mil Shrink Small-Outline (DL) and Thin Shrink Small-Outline (DGG) Packages

NOTE: For tape-and-reel order entry, the DGGR package is abbreviated to GR.

Widebus, EPIC are trademarks of Texas Instruments.

This 16-bit buffer/driver is designed for 1.65-V to 3.6-V V_CC operation.

The SN74ALVCH162244 is designed specifically to improve the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters.

The device can be used as four 4-bit buffers, two 8-bit buffers, or one 16-bit buffer. It provides true outputs and symmetrical active-low output-enable (OE)\ inputs.

The outputs, which are designed to sink up to 12 mA, include equivalent 26- resistors to reduce overshoot and undershoot.

To ensure the high-impedance state during power up or power down, OE\ should be tied to V_CC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.

The SN74ALVCH162244 is characterized for operation from –40°C to 85°C.

This 16-bit buffer/driver is designed for 1.65-V to 3.6-V V_CC operation.

The SN74ALVCH162244 is designed specifically to improve the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters.

The device can be used as four 4-bit buffers, two 8-bit buffers, or one 16-bit buffer. It provides true outputs and symmetrical active-low output-enable (OE)\ inputs.

The outputs, which are designed to sink up to 12 mA, include equivalent 26- resistors to reduce overshoot and undershoot.

To ensure the high-impedance state during power up or power down, OE\ should be tied to V_CC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.

The SN74ALVCH162244 is characterized for operation from –40°C to 85°C.

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Documentación técnica

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Documentación principal	Tipo	Título	Opciones de formato	Descargar la versión más reciente en inglés	Fecha
*	Hoja de datos	SN74ALVCH162244 datasheet (Rev. F)			7/09/2004
	Nota sobre la aplicación	An Overview of Bus-Hold Circuit and the Applications (Rev. B)			17/09/2018

Diseño y desarrollo

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